ATxmega32A4U Atmel Corporation, ATxmega32A4U Datasheet - Page 340

• Manufacturer Part Number: ATxmega32A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega32A4U

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

27.9
8331A–AVR–07/11
I/O Pin and Pin Out Configuration
When the EBI is enabled it will override the direction and/or value for the I/O pins where the EBI
lines are placed. The EBI will override the direction and value for the I/O pins where the EBI data
lines are placed. The EBI will only override value, but not direction for the I/O pins where the EBI
address and control lines are placed. These I/O pins must be configured to output when the EBI
is used. I/O pins for unused EBI address and control lines can be used as normal I/O pins or for
other alternate functions on the pins.
For control signals that are active-low, the pin output value should be set to one (high). For con-
trol signals that are active-high, pin output value should be set to zero (low). Address lines does
not requires specific pin output value configuration. The Chip Select lines should have pull-up
resistors to ensure that these are kept high during power-on and reset. If a Chip Select line is
active-high, a pull-down should be used instead of a pull-up.
For more details on I/O pin configuration refer to
The tables below summaries the actual port pin-out for the various SRAM and SDRAM configu-
rations and shows required pins and pin usage. Refer to the device datasheet to see which
actual I/O ports are used as EBI PORT0-3 for a specific AVR XMEGA device.
Table 27-4.
Note:
PORT3
PORT2
PORT1
PORT0
PORT0
A[23:0]
D[7:0]
AD[7:0]
PORT
1. “/” denotes: Address or data output controlled by ALE1/2; and “()” denotes: optional feature
selected on configuration.
7:0
7:0
7:0
7:4
3
2
1
0
Pinout SRAM
PIN
(1)
A[7:0]/
A[15:8]
D[7:0]
CS[3:0]
(A[19:16])
ALE1
RE
WE
3PORT
SRAM
ALE1
–
–
A[7:0]/
A[15:8]/
A[23:16]
D[7:0]
CS[3:0]
ALE2
ALE1
RE
WE
3PORT
ALE12
SRAM
”I/O Ports” on page
–
Atmel AVR XMEGA AU
A[15:8]
A[7:0]/
A[23:16]
D[7:0]
CS[3:0]
ALE2
RE
WE
3PORT
SRAM
ALE2
–
136.
A[15:8]
A[7:0]
D[7:0]
CS[3:0]
(A[21:18])
A17
A16
RE
WE
NOALE
3PORT
SRAM
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