ATxmega32A4U Atmel Corporation, ATxmega32A4U Datasheet - Page 16

• Manufacturer Part Number: ATxmega32A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega32A4U

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

3.14.7
3.14.8
8331A–AVR–07/11
SPL – Stack Pointer Register Low
SPH – Stack Pointer Register High
EXALL/EIJMP are used, and it will not be used if CALL and IJMP commands are used. For jump
or call to addresses below 128KB, this register is not used. This register is not available if the
program memory in the device is less than 128KB.
• Bit 7:0 – EIND[7:0]: Extended Indirect Address bits
These bits hold the MSB of the 24-bit address created by EIND and the 16-bit Z-register. Only
the number of bits required to access the available program memory is implemented for each
device. Unused bits will always read as zero.
The SPH and SPL register pair represent the 16-bit SP value. The SP holds the stack pointer
that points to the top of the stack. After reset, the stack pointer points to the highest internal
SRAM address. To prevent corruption when updating the stack pointer from software, a write to
SPL will automatically disable interrupts for the next four instructions or until the next I/O mem-
ory write.
Only the number of bits required to address the available data memory, including external mem-
ory, up to 64KB is implemented for each device. Unused bits will always read as zero.
Note:
• Bit 7:0 – SP[7:0]: Stack Pointer Register Low byte
These bits hold the LSB of the 16-bit stack pointer (SP).
Note:
• Bit 7:0 – SP[15:8]: Stack Pointer Register High byte
These bits hold the MSB of the 16-bit stack pointer (SP).
Bit
+0x0D
Read/Write
Initial Value
Bit
+0x0E
Read/Write
Initial Value
Bit
+0x0C
Read/Write
Initial Value
(1)
1. Refer to specific device datasheets for exact initial values.
1. Refer to specific device datasheets for exact initial values.
(1)
R/W
R/W
R/W
0/1
0/1
7
0
7
7
R/W
R/W
R/W
0/1
0/1
6
0
6
6
R/W
R/W
R/W
0/1
0/1
5
5
5
0
R/W
R/W
R/W
0/1
0/1
4
4
4
0
SP[15:8]
EIND[7:0]
SP[7:0]
R/W
R/W
0/1
R/W
0/1
Atmel AVR XMEGA AU
3
3
3
0
R/W
R/W
0/1
R/W
0/1
2
2
2
0
R/W
0/1
R/W
0/1
1
R/W
1
1
0
R/W
0/1
R/W
0/1
0
R/W
0
0
0
SPH
EIND
SPL
16