AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 99

• Manufacturer Part Number: AT89C5132
• Manufacturer: Atmel Corporation

Specifications of AT89C5132

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-12C
• Max I/o Pins: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Uart: 1
• Adc Channels: 2
• Adc Resolution (bits): 10
• Adc Speed (ksps): 22.7
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 2
• Isp: UART/USB
• Watchdog: Yes

4173E–USB–09/07
MMCON2 (S:E6h) – MMC Control Register 2
Reset Value = 0000 0000b
Table 81. MMSTA Register
MMSTA (S:DEh Read Only) – MMC Control and Status Register
MMCEN
Number
Number
4 - 3
2 - 1
7 - 6
Bit
Bit
7
7
6
5
0
7
5
-
Mnemonic Description
Mnemonic Description
DATD1:0
MMCEN
FLOWC
CBUSY
DCR
DCR
CCR
Bit
Bit
6
6
-
-
-
MMC Clock Enable Bit
Set to enable the MCLK clocks and activate the MMC controller.
Clear to disable the MMC clocks and freeze the MMC controller.
Data Controller Reset Bit
Set and clear to reset the data line controller in case of transfer abort.
Command Controller Reset Bit
Set and clear to reset the command line controller in case of transfer abort.
Reserved
The values read from these Bits are always 0. Do not set these Bits.
Used to delay the data transmission after a response from 3 MMC clock periods
(all Bits cleared) to 9 MMC clock periods (all Bits set) by step of 2 MMC clock
periods.
MMC Flow Control Bit
Set to enable the flow control during data transfers.
Clear to disable the flow control during data transfers.
Reserved
The values read from these Bits are always 0. Do not set these Bits.
Card Busy Flag
Set by hardware when the card sends a busy state on the data line.
Cleared by hardware when the card no more sends a busy state on the data line.
Data Transmission Delay Bits
CBUSY
CCR
5
5
CRC16S
4
4
-
DATFS
3
3
-
CRC7S
DATD1
2
2
AT89C5132
RESPFS
DATD0
1
1
FLOWC
CFLCK
0
0
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