AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 73

• Manufacturer Part Number: AT89C5132
• Manufacturer: Atmel Corporation

Specifications of AT89C5132

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-12C
• Max I/o Pins: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Uart: 1
• Adc Channels: 2
• Adc Resolution (bits): 10
• Adc Speed (ksps): 22.7
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 2
• Isp: UART/USB
• Watchdog: Yes

4173E–USB–09/07
Reset Value = 0000 0000b
Table 57. USBADDR Register
USBADDR (S:C6h) – USB Address Register
Bit Number
FEN
7
7
6
5
4
3
2
1
0
SDRMWUP
Mnemonic
SUSPCLK
RMWUPE
UADD6
FADDEN
UPRSM
CONFG
USBE
6
Bit
-
Description
USB Enable Bit
Set to enable the USB controller.
Clear to disable and reset the USB controller.
Suspend USB Clock Bit
Set to disable the 48 MHz clock input (Resume Detection is still active).
Clear to enable the 48 MHz clock input.
Send Remote Wake-up Bit
Set to force an external interrupt on the USB controller for Remote Wake UP
purpose.
An upstream resume is send only if the bit RMWUPE is set, all USB clocks are
enabled AND the USB bus was in SUSPEND state for at least 5 ms. See
UPRSM below.
Cleared by software.
Reserved
The values read from this bit is always 0. Do not set this bit.
Upstream Resume Bit (read only)
Set by hardware when SDRMWUP has been set and if RMWUPE is enabled.
Cleared by hardware after the upstream resume has been sent.
Remote Wake-up Enable Bit
Set to enable request an upstream resume signalling to the host.
Clear after the upstream resume has been indicated by RSMINPR.
Note: Do not set this bit if the host has not set the
DEVICE_REMOTE_WAKEUP feature for the device.
Configuration Bit
Set after a SET_CONFIGURATION request with a non-zero value has been
correctly processed.
Cleared by software when a SET_CONFIGURATION request with a zero value
is received.
Cleared by hardware on hardware reset or when an USB reset is detected on
the bus.
Function Address Enable Bit
Set by the device firmware after a successful status phase of a
SET_ADDRESS transaction. It shall not be cleared afterwards by the device
firmware.
Cleared by hardware on hardware reset or when an USB reset is received.
When this bit is cleared, the default function address is used (0).
UADD5
5
UADD4
4
UADD3
3
UADD2
2
AT89C5132
UADD1
1
UADD0
0
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