AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 105

• Manufacturer Part Number: AT89C5132
• Manufacturer: Atmel Corporation

Specifications of AT89C5132

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-12C
• Max I/o Pins: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Uart: 1
• Adc Channels: 2
• Adc Resolution (bits): 10
• Adc Speed (ksps): 22.7
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 2
• Isp: UART/USB
• Watchdog: Yes

17.1.1
4173E–USB–09/07
IDE Device Connection
Figure 17-2. IDE Write Waveforms
Notes:
Figure 17-3 and Figure 17-4 show two examples on how to interface up to two IDE devices to
the AT89C5132. In both examples P0 carries IDE low order data bits D7:0, P2 carries IDE high
order data bits D15:8, while RD and WR signals are respectively connected to the IDE nIOR and
nIOW signals. Other IDE control signals are generated by the external address latch outputs in
the first example while they are generated by some port I/Os in the second one. Using an exter-
nal latch will achieve higher transfer rate.
Figure 17-3. IDE Device Connection Example 1
Figure 17-4. IDE Device Connection Example 2
1. WR signal may be stretched using M0 bit in AUXR register.
2. When executing MOVX @Ri instruction, P2 outputs SFR content.
3. When executing MOVX @DPTR instruction, if DPHDIS is set (Page Access Mode), P2 out-
CPU Clock
puts SFR content instead of DPH.
WR
AT89C5132
AT89C5132
ALE
P0
P2
(1)
P0/AD7:0
P2/A15:8
P4.2:0
P4.4:3
P4.5
Px.y
ALE
WR
WR
RD
RD
P2
P0
P2
DPH or P2
DPL or Ri
Latch
(2),(3)
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
IDE Device 0
IDE Device 0
D15:8
D7:0
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
IDE Device 1
IDE Device 1
AT89C5132
P2
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