AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 27

• Manufacturer Part Number: AT89C5132
• Manufacturer: Atmel Corporation

Specifications of AT89C5132

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-12C
• Max I/o Pins: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Uart: 1
• Adc Channels: 2
• Adc Resolution (bits): 10
• Adc Speed (ksps): 22.7
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 2
• Isp: UART/USB
• Watchdog: Yes

8.4
4173E–USB–09/07
Registers
Table 13. PSW Register
PSW (S:8Eh) – Program Status Word Register
Reset Value = 0000 0000b
Table 14. AUXR Register
AUXR (S:8Eh) – Auxiliary Control Register
Bit Number
Bit Number
4 - 3
3 - 2
CY
7
6
5
4
7
7
6
5
2
1
0
7
-
Mnemonic
Mnemonic
DPHDIS
XRS1:0
EXT16
EXT16
RS1:0
AC
CY
AC
OV
Bit
M0
Bit
F0
F1
P
6
6
-
Description
Carry Flag
Carry out from bit 1 of ALU operands.
Auxiliary Carry Flag
Carry out from bit 1 of addition operands.
User Definable Flag 0.
Register Bank Select Bits
Refer to Table 10 for Bits description.
Overflow Flag
Overflow set by arithmetic operations.
User Definable Flag 1
Parity Bit
Set when ACC contains an odd number of 1’s.
Cleared when ACC contains an even number of 1’s.
Description
Reserved
The values read from this bit is indeterminate. Do not set this bit.
External 16-bit Access Enable Bit
Set to enable 16-bit access mode during MOVX instructions.
Clear to disable 16-bit access mode and enable standard 8-bit access mode during
MOVX instructions.
External Memory Access Stretch Bit
Set to stretch RD or WR signals duration to 15 CPU clock periods.
Clear not to stretch RD or WR signals and set duration to 3 CPU clock periods.
DPH Disable Bit
Set to disable DPH output on P2 when executing MOVX @DPTR instruction.
Clear to enable DPH output on P2 when executing MOVX @DPTR instruction.
Expanded RAM Size Bits
Refer to Table 11 for ERAM size description.
M0
F0
5
5
DPHDIS
RS1
4
4
XRS1
RS0
3
3
XRS0
OV
2
2
EXTRAM
AT89C5132
F1
1
1
AO
P
0
0
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