AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 12

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AT89C5132

Manufacturer Part Number
AT89C5132
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C5132

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-12C
Max I/o Pins
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Uart
1
Adc Channels
2
Adc Resolution (bits)
10
Adc Speed (ksps)
22.7
Sram (kbytes)
2.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 3.6
Timers
2
Isp
UART/USB
Watchdog
Yes

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6. Clock Controller
6.1
6.2
12
Oscillator
X2 Feature
AT89C5132
The AT89C5132 clock controller is based on an on-chip oscillator feeding an on-chip Phase
Lock Loop (PLL). All internal clocks to the peripherals and CPU core are generated by this
controller.
The AT89C5132 X1 and X2 pins are the input and the output of a single-stage on-chip inverter
(see Figure 6-1) that can be configured with off-chip components such as a Pierce oscillator
(see Figure 6-2). Value of capacitors and crystal characteristics are detailed in the Section “DC
Characteristics”.
The oscillator outputs three different clocks: a clock for the PLL, a clock for the CPU core, and a
clock for the peripherals as shown in Figure 6-1. These clocks are either enabled or disabled,
depending on the power reduction mode as detailed in the
page
Port sampling clocks.
Figure 6-1.
Figure 6-2.
Unlike standard C51 products that require 12 oscillator clock periods per machine cycle, the
AT89C5132 needs only 6 oscillator clock periods per machine cycle. This feature called the “X2
feature” can be enabled using the X2 bit
to operate in 6 or 12 oscillator clock periods per machine cycle. As shown in Figure 6-1, both
CPU and peripheral clocks are affected by this feature. Figure 6-3 shows the X2 mode switching
waveforms. After reset, the standard mode is activated. In standard mode, the CPU and periph-
44. The peripheral clock is used to generate the Timer 0, Timer 1, MMC, ADC, SPI, and
X1
X2
Oscillator Block Diagram and Symbol
Crystal Connection
Peripheral Clock Symbol
CLOCK
PCON.1
PER
PD
V
SS
(1)
CPU Core Clock Symbol
in CKCON (see Table 1) and allows the AT89C5132
C1
C2
÷
2
CLOCK
CPU
CKCON.0
Q
X2
0
1
X1
X2
section“Power Management” on
PCON.0
IDL
Oscillator Clock Symbol
CLOCK
OSC
Peripheral
Clock
CPU Core
Clock
Oscillator
Clock
4173E–USB–09/07

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