AT32UC3B1128 Atmel Corporation, AT32UC3B1128 Datasheet - Page 36

• Manufacturer Part Number: AT32UC3B1128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B1128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

3.9.1.23
3.9.1.24
3.9.1.25
32002F–03/2010
DTLB Write Protection Exception
DTLB Modified Exception
Privilege Violation Exception
The DTLB Protection exception is generated when the data memory write violates the access
rights specified by the protection region in which the address lies. Used only if an MPU is
present.
If the application tries to execute privileged instructions, this exception is issued. The complete
list of priveleged instructions is shown in
routine, the address of the instruction that caused the exception is stacked as the return
address.
Table 3-6.
Unused in AVR32UC, since it has no MMU.
Privileged Instructions
csrf - clear status register flag
mtsr - move to system register
mfsr - move from system register
mtdr - move to debug register
mfdr - move from debug register
rete- return from exception
rets - return from supervisor call
retd - return from debug mode
sleep - sleep
ssrf - set status register flag
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA | 0x3C;
*(--SP
*(--SP
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA | 0x40;
*(--SP
*(--SP
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA | 0x28;
SYS
SYS
SYS
SYS
List of instructions which can only execute in privileged modes.
) = PC;
) = SR;
) = PC;
) = SR;
Comment
Privileged only when accessing upper half of status register
Privileged only when accessing upper half of status register
Table 3-6 on page
36. When entering the exception
AVR32
36