AT32UC3B1128 Atmel Corporation, AT32UC3B1128 Datasheet - Page 139

• Manufacturer Part Number: AT32UC3B1128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B1128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9.8.1.2
9.8.2
9.8.2.1
9.8.2.2
32002F–03/2010
NanoTrace
Interpreting the results
Starting NanoTrace
Controlling buffer overflow
The user should monitor the RESULT register. The possible values are:
Table 9-54.
The MSU redirect OCD trace output from the normal trace output port to memory. This feature is
called NanoTrace, and enables trace functionality with low cost debuggers, or even trace sup-
port in self hosted debuggers.
The memory range to write the trace data to is specified by writing the start address into the
ADDRHI and ADDRLO registers, and the size of the memory range into the LENGTH register. In
addition, the TAIL register may need to be updated, see below for details. Both the start address
and the length must be word aligned.
The MSU starts expecting trace data when OP_NANOTRACE is written to the CTRL register.
The OCD system must be separately configured to actually produce trace data.
The ntbc field of CTRL controls how the memory service behaves when the trace buffer is full.
The trace buffer as specified by the initial ADDRHI, ADDRLO and LENGTH registers works as a
circular buffer. The ADDRLO register is used by the MSU as the insert or head pointer, and the
TAIL register is used by the debugger as the extract or tail pointer. ADDRHI is used together
with both ADDRLO and TAIL to generate complete SAB addresses.
While writing trace data to memory, the ADDRLO and LENGTH registers are continuously
updated with the current address being written and bytes remaining until the end of the buffer.
When LENGTH reaches zero, the original contents of ADDRLO and LENGTH are restored, and
trace data are again written from the beginning of the buffer.
The trace buffer is considered to be full when the ADDRLO register reaches the same value as
TAIL. When starting trace, the TAIL register should be written to the same value as ADDRLO,
meaning that the entire buffer can be written before ADDRLO matches TAIL. During tracing, a
debugger may read out trace data from the buffer area between ADDRLO and TAIL, and then
update TAIL. This will release space in the buffer, and can potentially allow continuos tracing if
the trace buffer can be read out faster than trace data is generated.
When the buffer does fill up, the behavior of the MSU depends on the setting of the ntbc field:
Result
NOT_IMPL
CANCELED
BUSY
DONE
BUS_ERR
• OVER: The unit keeps tracing, overwriting old trace data. The wrap field in the STATUS
register is set to indicate that trace data are lost. The OCD system is asked to generate a
synchronization message as soon as possible. The wrap field must be manually cleared by
writing it to zero.
CRC results
Description
The CRC feature is not implemented in this device.
The CRC operation was canceled by writing a value different from OP_CRC to CTRL.
The CRC operation is running.
The CRC operation has completed.
Part of the specified memory could not be read or written.
The offending address can be read out of ADDRHI and ADDRLO.
AVR32
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