AT32UC3A1512AU Atmel Corporation, AT32UC3A1512AU Datasheet - Page 624

• Manufacturer Part Number: AT32UC3A1512AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1512AU

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
30.8.3.16
Offset:
Register Name:
Access Type:
Reset Value:
• RXINE: Received IN Data Interrupt Enable
Set by software (by setting the RXINES bit) to enable the Received IN Data interrupt (RXINE).
Clear by software (by setting the RXINEC bit) to disable the Received IN Data interrupt (RXINE).
• TXOUTE: Transmitted OUT Data Interrupt Enable
Set by software (by setting the TXOUTES bit) to enable the Transmitted OUT Data interrupt (TXOUTE).
Clear by software (by setting the TXOUTECbit) to disable the Transmitted OUT Data interrupt (TXOUTE).
• TXSTPE: Transmitted SETUP Interrupt Enable
Set by software (by setting the TXSTPES bit) to enable the Transmitted SETUP interrupt (TXSTPE).
Clear by software (by setting the TXSTPEC bit) to disable the Transmitted SETUP interrupt (TXSTPE).
• UNDERFIE: Underflow Interrupt Enable
Set by software (by setting the UNDERFIES bit) to enable the Underflow interrupt (UNDERFIE).
Clear by software (by setting the UNDERFIEC bit) to disable the Underflow interrupt (UNDERFIE).
• PERRE: Pipe Error Interrupt Enable
Set by software (by setting the PERRES bit) to enable the Pipe Error interrupt (PERRE).
Clear by software (by setting the PERREC bit) to disable the Pipe Error interrupt (PERRE).
• NAKEDE: NAKed Interrupt Enable
Set by software (by setting the NAKEDES bit) to enable the NAKed interrupt (NAKEDE).
Clear by software (by setting the NAKEDEC bit) to disable the NAKed interrupt (NAKEDE).
PACKETIE
SHORT
31
23
15
ru
–
–
–
7
0
USB Pipe X Control Register (UPCONX)
RXSTALLDE/
CRCERRE
FIFOCON
30
22
14
ru
ru
–
–
0
6
0
OVERFIE
29
21
13
ru
–
–
–
5
0
0x05C0 + X . 0x04
UPCONX, X in [0..6]
Read-Only
0x00000000
NBUSYBKE
NAKEDE
28
20
12
ru
ru
–
–
0
4
0
PERRE
27
19
11
ru
–
–
–
3
0
UNDERFIE
TXSTPE/
RSTDT
26
18
10
ru
ru
–
0
–
2
0
PFREEZE
TXOUTE
25
17
ru
ru
–
0
9
–
1
0
AT32UC3A
PDISHDMA
RXINE
24
16
ru
ru
–
0
8
–
0
0
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