M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 198
M28529G-12
Manufacturer Part Number
M28529G-12
Description
ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.M28529G-12.pdf
(309 pages)
Specifications of M28529G-12
Package
484BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3.135 V
Maximum Operating Supply Voltage
1.89|3.465 V
Maximum Output Rate
8.192 Mbps
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2.3.10
2.3.11
28529-DSH-001-K
Footnote:
(1) This bit is a pointer to the next interrupt indication register to be read. This bit will be cleared when the interrupt bit in the corresponding
interrupt indication register is read and automatically cleared.
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0xF09—SUMPORT2 (Summary Port Interrupt Status Register for TC ports
16-23)
0xF0A—ENSUMPORT2 (Summary Port Interrupt Control Register for TC
Ports 16-23)
PortInt[23]
PortInt[22]
PortInt[21]
PortInt[20]
PortInt[19]
PortInt[18]
PortInt[17]
PortInt[16]
EnPortInt[23]
EnPortInt[22]
EnPortInt[21]
EnPortInt[20]
EnPortInt[19]
EnPortInt[18]
EnPortInt[17]
EnPortInt[16]
Name
Name
1
1
1
1
1
1
1
1
Mindspeed Proprietary and Confidential
Mindspeed Technologies
This bit is a summary indicator of the interrupts from the Port 23 SUMINT register (0x5C0).
This bit is a summary indicator of the interrupts from the Port 22 SUMINT register (0x580).
This bit is a summary indicator of the interrupts from the Port 21 SUMINT register (0x540).
This bit is a summary indicator of the interrupts from the Port 20 SUMINT register (0x500).
This bit is a summary indicator of the interrupts from the Port 19 SUMINT register (0x4C0).
This bit is a summary indicator of the interrupts from the Port 18 SUMINT register (0x480).
This bit is a summary indicator of the interrupts from the Port 17 SUMINT register (0x440).
This bit is a summary indicator of the interrupts from the Port 16 SUMINT register (0x400).
When set, this bit enables PortInt[23] to appear on the MicroInt* output.
When set, this bit enables PortInt[22] to appear on the MicroInt* output.
When set, this bit enables PortInt[21] to appear on the MicroInt* output.
When set, this bit enables PortInt[20] to appear on the MicroInt* output.
When set, this bit enables PortInt[19] to appear on the MicroInt* output.
When set, this bit enables PortInt[18] to appear on the MicroInt* output.
When set, this bit enables PortInt[17] to appear on the MicroInt* output.
When set, this bit enables PortInt[16] to appear on the MicroInt* output.
®
Description
Description
Registers
183
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