M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 195

• Manufacturer Part Number: M28529G-12
• Description: ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of M28529G-12

• Package: 484BGA
• Utopia Type: Level 2
• Typical Operating Supply Voltage: 1.8|3.3 V
• Minimum Operating Supply Voltage: 1.71|3.135 V
• Maximum Operating Supply Voltage: 1.89|3.465 V
• Maximum Output Rate: 8.192 Mbps

2.3.3
2.3.4
2.3.5
28529-DSH-001-K
4–0
7–6
7–2
1–0
Bit
Bit
3-0
Bit
7
6
5
5
4
Default
Default
Default
000000
00000
0000
—
00
00
0
1
0
0
0xF02—PHYINTFC (PHY-side Interface Control Register)
0xF03—ATMINTFC (ATM-side Interface Control Register)
0xF04—STATOUT (Output Status Control Register)
PHYIntSelPin
PHYBusWidth
ATMmux[1:0]
ATMBusWidth
DualClavEnb
StatOut[1:0]
Name
Name
Name
—
—
—
—
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Reserved, set to 0.
This bit reflects the level of the external PhyIntFcSel pin (read only)
When set to 0, the PHY-side UTOPIA interface is set to 16-bit mode.
When set to 1, the PHY-side UTOPIA interface is set to 8-bit mode.
Reserved, set to zero.
Controls the ATM-side UTOPIA interface mux.
When set to 0, the 16-bit UTOPIA bus is enabled
When set to 1, the 8-bit UTOPIA bus is enabled.
When set to 1, Dual Clav/Enb mode on the interface is enabled. When set to 0, single clav/enb
is enabled. For single Clav mode, UrxEnb[1] and UtxEnB[1] are not used but must be pulled
up.
Reserved, set to zero.
Reserved, set to zero.
The value written into these bits will be asserted on the StatOut[1:0] output pins.
00 – External interface is placed in Tristate mode.
01 – UTOPIA level 2 interface to IMA32 block is enabled.
10 – UTOPIA level 2 interface to TC block is enabled.
11 – External interface is placed in Tristate mode.
®
Description
Description
Description
Registers
180