UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 423

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

20.3 External Device Expansion Function Timing
(1) RD pin (Alternate function: P64)
(2) WR pin (Alternate function: P65)
(3) WAIT pin (Alternate function: P66)
(4) ASTB pin (Alternate function: P67)
(5) AD0 to AD7, A8 to A15 pins (Alternate function: P40 to P47, P50 to P57)
The timing control signal output pins in the external memory expansion mode are as follows.
The timing charts are shown in Figures 20-5 to 20-8.
Read strobe signal output pin. The read strobe signal is output when data is read and instructions are fetched
from external memory.
During internal memory read, the read strobe signal is not output (maintains high level).
Write strobe signal output pin. The write strobe signal is output when data is written to external memory.
During internal memory write, the write strobe signal is not output (maintains high level).
External wait signal input pin.
When the external wait is not used, the WAIT pin can be used as an I/O port pin.
During internal memory access, the external wait signal is ignored.
Address strobe signal output pin. The address strobe signal is output regardless of data access and instruction
fetch from external memory.
During internal memory access, the address strobe signal is output.
Address/data signal output pins. A valid signal is output or input during data accesses and instruction fetches
from external memory.
These signals change even during internal memory access (output values are undefined).
CHAPTER 20 EXTERNAL DEVICE EXPANSION FUNCTION
User’s Manual U14260EJ4V0UD
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