UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 193

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.3 Registers to Control 8-Bit Timer/Event Counters 50, 51
(1) Timer clock select register 5n (TCL5n: n = 0, 1)
The following four types of registers are used to control 8-bit timer/event counters 50, 51.
• Timer clock select register 5n (TCL5n)
• 8-bit timer mode control register 5n (TMC5n)
• Port mode register 7 (PM7)
• Port register 7 (P7)
Remark n = 0, 1
Address: FF71H
Symbol
TCL50
Note Expanded-specification products of PD780078 Subseries only.
Cautions 1. When rewriting TCL50 to other data, stop the timer operation beforehand.
Remarks 1. When cascade connection is used, only TCL50 is valid for count clock setting.
This register sets the count clock of 8-bit timer/event counter 5n and the valid edge of TI50, TI51 input.
TCL5n is set by an 8-bit memory manipulation instruction.
RESET input clears TCL5n to 00H.
2. f
2. Be sure to set bits 3 to 7 to “0”.
TCL502
X
7
0
0
0
0
0
1
1
1
1
: Main system clock oscillation frequency
After reset: 00H
Figure 9-5. Format of Timer Clock Select Register 50 (TCL50)
TCL501
CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 50, 51
6
0
0
0
1
1
0
0
1
1
TCL500
R/W
5
0
0
1
0
1
0
1
0
1
User’s Manual U14260EJ4V0UD
TI50 falling edge
TI50 rising edge
f
f
f
f
f
f
X
X
X
X
X
X
/2
/2
/2
/2
/2
2
4
6
8
10
4
0
3
0
Count clock selection
8.38 MHz
2.09 MHz
523 kHz
131 kHz
32.7 kHz
8.18 kHz
TCL502
f
X
2
= 8.38 MHz
TCL501
1
12 MHz
3 MHz
750 kHz
187 kHz
46.8 kHz
11.7 kHz
f
X
= 12 MHz
TCL500
0
Note
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