UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 218

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UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0078GK-9ET-A

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11.2 Watchdog Timer Configuration
11.3 Registers to Control Watchdog Timer
(1) Watchdog timer clock select register (WDCS)
216
The watchdog timer consists of the following hardware.
The following two registers are used to control the watchdog timer.
• Watchdog timer clock select register (WDCS)
• Watchdog timer mode register (WDTM)
Address: FF42H
Symbol
WDCS
This register sets the overflow time of the watchdog timer and the interval timer.
WDCS is set by an 8-bit memory manipulation instruction.
RESET input clears WDCS to 00H.
Note Expanded-specification products of PD780078 Subseries only.
Remark f
X
: Main system clock oscillation frequency
WDCS2
Figure 11-2. Format of Watchdog Timer Clock Select Register (WDCS)
7
0
0
0
0
0
1
1
1
1
Control registers
After reset: 00H
Item
WDCS1
6
0
0
0
1
1
0
0
1
1
Table 11-1. Watchdog Timer Configuration
Watchdog timer clock select register (WDCS)
Watchdog timer mode register (WDTM)
CHAPTER 11 WATCHDOG TIMER
WDCS0
R/W
5
0
0
1
0
1
0
1
0
1
User’s Manual U14260EJ4V0UD
2
2
2
2
2
2
2
2
12
13
14
15
16
17
18
20
/f
/f
/f
/f
/f
/f
/f
/f
4
0
X
X
X
X
X
X
X
X
Overflow time of watchdog timer/interval timer
Configuration
3
0
f
488 s
977 s
1.95 ms
3.91 ms
7.82 ms
15.6 ms
31.2 ms
125 ms
X
= 8.38 MHz
WDCS2
2
WDCS1
1
f
341 s
682 s
1.36 ms
2.73 ms
5.46 ms
10.9 ms
21.8 ms
87.3 ms
X
= 12 MHz
WDCS0
Note
0

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