UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 324

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(3) Port mode registers 2 and 8 (PM2, PM8)
322
Remark fx: Main system clock oscillation frequency
Cautions 1. Do not write to CSIC1 when CSIE1 = 1 (operation enabled).
Address: FF22H After reset: FFH
Address: FF28H After reset: FFH
PM2 and PM8 are registers that set input/output of ports 2 and 8 in 1-bit units.
When using the P21/SO1 pin as a serial data output, set PM21 and the output latch of P21 to 0.
When using the P20/SI1 pin as a serial data input, the P22/SCK1 pin as a clock input, and the P80/SS1 pin as
a chip select input, set PM20, PM22, and PM80 to 1.
At this time, the output latches of P20, P22, and P80 can be either 0 or 1.
PM2 and PM8 are set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets PM2 and PM8 to FFH.
Symbol
PM2
Symbol
PM8
2. When using the P22/SCK1 pin as a general-purpose port pin, set CKP1 to 1.
3. The phase type of the data clock is type 3 after reset.
PM2n
PM80
7
1
0
1
7
1
0
1
Output mode (output buffer on)
Input mode (output buffer off)
Output mode (output buffer on)
Input mode (output buffer off)
Figure 17-4. Format of Port Mode Register 2 (PM2)
Figure 17-5. Format of Port Mode Register 8 (PM8)
6
1
6
1
CHAPTER 17 SERIAL INTERFACE CSI1
R/W
R/W
PM25
5
5
1
User’s Manual U14260EJ4V0UD
I/O mode selection of P2n pin (n = 0 to 5)
PM24
I/O mode selection of P80 pin
4
4
1
PM23
3
3
1
PM22
2
2
1
PM21
1
1
1
PM20
PM80
0
0