UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 157

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

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(4) Prescaler mode register 0n (PRM0n: n = 0, 1)
Address: FF61H
Symbol
PRM00
Cautions 1. Always set data to PRM00 after stopping the timer operation.
Remarks 1. f
This register is used to set the 16-bit timer counter 0n (TM0n) count clock and TI00n, TI01n pin input valid edges.
PRM0n is set by an 8-bit memory manipulation instruction.
RESET input clears PRM0n to 00H.
Notes 1. Expanded-specification products of PD780078 Subseries only.
2. The external clock requires a pulse two cycles longer than internal clock (f
3. When the valid edge of the TI000 pin is selected, the main system clock is used as the sampling clock
2. TI000 or TI010 pin: 16-bit timer/event counter 00 input pin
2. If the valid edge of the TI000 pin is to be set as the count clock, do not set the clear & start
3. When P70 is used as the valid edge of the TI000 pin, it cannot be used as the timer output
4. If the TI000 or TI010 pin is high level immediately after system reset, the rising edge is
for noise elimination. The valid edge of the TI000 pin can be used only when the main system clock
is operating.
PRM010
ES110
ES110
ES010
X
mode and the capture trigger at the valid edge of the TI000 pin.
(TO00 pin), and when used as the TO00 pin, it cannot be used as the valid edge of the TI000
pin.
immediately detected after the rising edge or both the rising and falling edges are set as
the valid edge(s) of the TI000 pin or TI010 pin to enable the operation of 16-bit timer counter
00 (TM00). Be careful when pulling up the TI000 pin or the TI010 pin. However, the rising
edge is not detected if the TI000 pin or the TI010 pin is high level at restart after the operation
has been stopped.
7
0
0
1
1
0
0
1
1
0
0
1
1
: Main system clock oscillation frequency
After reset: 00H
Figure 8-12. Format of Prescaler Mode Register 00 (PRM00)
PRM000
ES100
ES100
ES000
CHAPTER 8 16-BIT TIMER/EVENT COUNTERS 00, 01
6
0
1
0
1
0
1
0
1
0
1
0
1
Falling edge
Rising edge
Setting prohibited
Both falling and rising edges
Falling edge
Rising edge
Setting prohibited
Both falling and rising edges
f
f
f
TI000 pin valid edge
X
X
X
ES010
/2
/2
R/W
2
6
5
User’s Manual U14260EJ4V0UD
ES000
4
Notes 2, 3
TI010 pin valid edge selection
TI000 pin valid edge selection
8.38 MHz
2.09 MHz
130 kHz
Count clock selection
3
0
f
X
= 8.38 MHz
2
0
12 MHz
3 MHz
187 kHz
PRM010
f
X
1
X
= 12 MHz
/2
3
).
PRM000
Note 1
0
155