UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 335

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UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0078GK-9ET-A

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18.1 Functions of Serial Interface IIC0
(1) Operation stop mode
(2) I
Serial interface IIC0 has the following two modes.
Figure 18-1 shows a block diagram of serial interface IIC0.
• 97.5 kHz (standard mode) or 350 kHz (high-speed mode): When operated at f
This mode is used when serial transfers are not performed. It can therefore be used to reduce power consumption.
This mode is used for 8-bit data transfers with several devices via two lines: a serial clock (SCL0) line and a
serial data bus (SDA0) line.
The transfer rate is as follows.
This mode complies with the I
data segments when transmitting via the serial data bus. These condition and data segments are automatically
detected by hardware during reception.
Since SCL0 and SDA0 are open-drain outputs, the IIC0 requires pull-up resistors for the serial clock line (SCL0)
and the serial data bus line (SDA0).
2
C bus mode (multimaster supported)
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780078Y SUBSERIES ONLY)
2
C bus format and can output “start condition”, “address”, “data”, and “stop condition”
User’s Manual U14260EJ4V0UD
X
= 8.38 MHz
333

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