ISP1563BMGA ST-Ericsson Inc, ISP1563BMGA Datasheet - Page 82

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ISP1563BMGA

Manufacturer Part Number
ISP1563BMGA
Description
IC USB HOST CTRL HI-SPD 128LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1563BMGA

Applications
USB Host/Function Processor
Interface
EHCI Interface
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-LQFP
Mounting Type
Surface Mount
For Use With
UM10066 - EVAL BRD FOR ISP1563
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISP1563BM-S
ISP1563BM-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1563BMGA
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Philips Semiconductors
[1]
Table 112: ASYNCLISTADDR - Current Asynchronous List Address register bit allocation
Address: Value read from func2 of address 10h + 38h
[1]
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
The reserved bits should always be written with the reset value.
11.4.6 ASYNCLISTADDR register
R/W
R/W
R/W
R/W
R/W
31
23
15
7
0
0
0
0
7
0
Table 111: PERIODICLISTBASE - Periodic Frame List Base Address register bit description
Address: Value read from func2 of address 10h + 34h
This 32-bit register contains the address of the next asynchronous queue head to be
executed. If the Host Controller is in 64-bit mode, as indicated by logic 1 in 64AC (bit 0 of
the HCCPARAMS register), the most significant 32 bits of every control data structure
address comes from the CTRLDSSEGMENT register. Bits 4 to 0 of this register always
return zeros when read. The memory structure referenced by the physical memory pointer
is assumed as 32 B (cache aligned). For bit allocation, see
Bit
31 to 12
11 to 0
R/W
R/W
R/W
R/W
R/W
30
22
14
6
0
0
0
0
6
0
LPL[3:0]
Symbol
BA[19:0]
reserved
R/W
R/W
R/W
R/W
R/W
29
21
13
5
0
0
0
0
5
0
Rev. 01 — 14 July 2005
Description
Base Address: These bits correspond to memory address signals
31 to 12, respectively.
-
R/W
R/W
R/W
R/W
R/W
28
20
12
4
0
0
0
0
4
0
reserved
reserved
LPL[19:12]
LPL[11:4]
[1]
[1]
R/W
R/W
R/W
R/W
R/W
27
19
11
3
0
0
0
0
3
0
R/W
R/W
R/W
R/W
R/W
26
18
10
2
0
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Table
HS USB PCI Host Controller
reserved
112.
[1]
R/W
R/W
R/W
R/W
R/W
25
17
1
0
0
0
9
0
1
0
ISP1563
R/W
R/W
R/W
R/W
R/W
82 of 107
24
16
0
0
0
0
8
0
0
0

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