ISP1563BMGA ST-Ericsson Inc, ISP1563BMGA Datasheet - Page 30

• Manufacturer Part Number: ISP1563BMGA
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1563BMGA

• Applications: USB Host/Function Processor
• Interface: EHCI Interface
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• For Use With: UM10066 - EVAL BRD FOR ISP1563
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1563BM-S; ISP1563BM-S

Philips Semiconductors
Table 35:
Address: Value read from address 34h + 4h
[1]
[2]
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Sticky bit, if the function supports PME# from D3
function does not support PME# from D3
The reserved bits should always be written with the reset value.
PMCSR - Power Management Control/Status register bit allocation
8.2.3.4 PMCSR register
PMES
R/W
R/W
X
15
7
0
[1]
The Power Management Control/Status (PMCSR) register is a 2 B register used to
manage the Power Management State of the PCI function, as well as to allow and monitor
Power Management Events (PMEs). The bit allocation of the register is given in
Table 36:
Address: Value read from address 34h + 4h
Bit
15
14 to 13 DS[1:0]
12 to 9
R/W
14
R
0
6
0
Symbol
PMES
D_S[3:0]
PMCSR - Power Management Control/Status register bit description
DS[1:0]
cold
.
R/W
Description
PME Status: This bit is set when the function normally assert the PME#
signal independent of the state of the PMEE bit. Writing logic 1 to this bit
clears it and causes the function to stop asserting PME#, if enabled. Writing
logic 0 has no effect. This bit defaults to logic 0, if the function does not
support the PME# generation from D3
generation from D3
the operating system each time the operating system is initially loaded.
Data Scale: This two-bit read-only field indicates the scaling factor when
interpreting the value of the Data register. The value and meaning of this field
vary, depending on which data value is selected by the D_S field. This field is
a required component of the Data register (offset 7) and must be
implemented, if the Data register is implemented. If the Data register is not
implemented, this field must return 00b when PMCSR is read.
Data_Select: This four-bit field selects the data that is reported through the
Data register and the D_S field. This field is a required component of the
Data register (offset 7) and must be implemented, if the Data register is
implemented. If the Data register is not implemented, this field must return
00b when PMCSR is read.
13
R
0
5
0
cold
reserved
, then X is indeterminate at the time of initial operating system boot; X is 0 if the
Rev. 01 — 14 July 2005
[2]
R/W
R/W
12
0
4
0
cold
, then this bit is sticky and must be explicitly cleared by
R/W
R/W
11
0
3
0
D_S[3:0]
cold
R/W
R/W
. If the function supports the PME#
10
0
2
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
R/W
R/W
9
0
1
0
ISP1563
PS[1:0]
Table
PMEE
R/W
R/W
X
30 of 107
8
0
0
[1]
35.