ISP1563BMGA ST-Ericsson Inc, ISP1563BMGA Datasheet - Page 66

• Manufacturer Part Number: ISP1563BMGA
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1563BMGA

• Applications: USB Host/Function Processor
• Interface: EHCI Interface
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• For Use With: UM10066 - EVAL BRD FOR ISP1563
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1563BM-S; ISP1563BM-S

Philips Semiconductors
Table 88:
Address: Value read from func0 or func1 of address 10h + 100h
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HceControl - Host Controller Emulation Control register bit allocation
11.2.1 HceControl register
11.2 USB legacy support registers
R/W
R/W
R/W
31
23
15
0
0
0
The ISP1563 supports legacy keyboard and mouse. Four operational registers are used
to provide the legacy support. Each of these registers is located on a 32-bit boundary. The
offset of these registers is relative to the base address of the Host Controller operational
registers with HceControl located at offset 100h.
Table 86:
Table 87:
Table 88
Offset Register
100h
104h
108h
10Ch
I/O
address
60h
60h
64h
64h
R/W
R/W
R/W
30
22
14
0
0
0
HceControl
HceInput
HceOutput
HceStatus
shows the bit allocation of the register.
Cycle
type
IN
OUT
IN
OUT
Legacy support registers
Emulated registers
Register contents
accessed or modified
HceOutput
HceInput
HceStatus
HceInput
R/W
R/W
R/W
29
21
13
0
0
0
Description
used to enable and control the emulation hardware and report various
status information
emulation of the legacy Input Buffer register
emulation of the legacy Output Buffer register in which the software writes
keyboard and mouse data
emulation of the legacy Status register
Rev. 01 — 14 July 2005
reserved
R/W
R/W
R/W
28
20
12
0
0
0
reserved
reserved
[1]
Side effects
IN from port 60h sets OUT_FULL (bit 0) in
HceStatus to logic 0
OUT to port 60h sets IN_FULL (bit 1) to logic 1 and
CMD_DATA (bit 3) to logic 0 in HceStatus
IN from port 64h returns current value of HceStatus
with no other side effect
OUT to port 64h sets IN_FULL to logic 0 and
CMD_DATA to logic 1 in HceStatus
[1]
[1]
R/W
R/W
R/W
27
19
11
0
0
0
R/W
R/W
R/W
26
18
10
0
0
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
R/W
R/W
R/W
25
17
0
0
9
0
ISP1563
A20S
R/W
R/W
R/W
66 of 107
24
16
0
0
8
0