ISP1563BMGA ST-Ericsson Inc, ISP1563BMGA Datasheet - Page 81

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ISP1563BMGA

Manufacturer Part Number
ISP1563BMGA
Description
IC USB HOST CTRL HI-SPD 128LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1563BMGA

Applications
USB Host/Function Processor
Interface
EHCI Interface
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-LQFP
Mounting Type
Surface Mount
For Use With
UM10066 - EVAL BRD FOR ISP1563
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISP1563BM-S
ISP1563BM-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1563BMGA
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Philips Semiconductors
Table 110: PERIODICLISTBASE - Periodic Frame List Base Address register bit allocation
Address: Value read from func2 of address 10h + 34h
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
11.4.5 PERIODICLISTBASE register
R/W
R/W
R/W
31
23
15
0
0
0
Table 109: FRINDEX - Frame Index register bit description
Address: Value read from func2 of address 10h + 2Ch
The Periodic Frame List Base Address (PERIODLISTBASE) register contains the
beginning address of the periodic frame list in the system memory. If the Host Controller is
in 64-bit mode, as indicated by logic 1 in 64AC (bit 0 in the HCCSPARAMS register), the
most significant 32 bits of every control data structure address comes from the
CTRLDSSEGMENT register. The system software loads this register before starting the
schedule execution by the Host Controller. The memory structure referenced by this
physical memory pointer is assumed as 4 kB aligned. The contents of this register are
combined with the FRINDEX register to enable the Host Controller to step through the
periodic frame list in sequence.
The bit allocation is given in
Bit
13 to 0
R/W
R/W
R/W
30
22
14
0
0
0
Symbol
FRINDEX
[13:0]
BA[3:0]
R/W
R/W
R/W
29
21
13
0
0
0
Description
Frame Index: Bits in this register are used for the frame number in the SOF
packet and as the index into the frame list. The value in this register
increments at the end of each time frame. For example, micro frame. The
bits used for the frame number in the SOF token are taken from bits 13 to 3
of this register. Bits N to 3 are used for the frame list current index. This
means that each location of the frame list is accessed eight times (frames
or micro frames) before moving to the next index.
The following illustrates values of N based on the value of FLS[1:0]
(bits 3 to 2 in the USBCMD register).
Rev. 01 — 14 July 2005
Table
FLS[1:0]
R/W
R/W
R/W
00b
01b
10b
11b
28
20
12
0
0
0
110.
BA[19:12]
BA[11:4]
R/W
R/W
R/W
27
19
11
0
0
0
Number elements
reserved
…continued
R/W
R/W
R/W
26
18
10
1024
512
256
0
0
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
reserved
[1]
R/W
R/W
R/W
25
17
0
0
9
0
ISP1563
N
12
11
10
-
R/W
R/W
R/W
81 of 107
24
16
0
0
8
0

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