ADV7180BSTZ Analog Devices Inc, ADV7180BSTZ Datasheet - Page 85
![IC VIDEO DECODER SDTV 64-LQFP](/photos/6/60/66065/505-64-lqfp_sml.jpg)
ADV7180BSTZ
Manufacturer Part Number
ADV7180BSTZ
Description
IC VIDEO DECODER SDTV 64-LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet
1.ADV7180BSTZ.pdf
(116 pages)
Specifications of ADV7180BSTZ
Design Resources
Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
Applications
Digital Cameras, Mobile Phones, Portable Video
Voltage - Supply, Analog
1.71 V ~ 1.89 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Resolution (bits)
10bit
Input Format
Analog
Output Format
Digital
Adc Sample Rate
57.27MSPS
Power Dissipation Pd
15µW
No. Of Input Channels
6
Supply Voltage Range
1.71V To 1.89V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADV7180LQEBZ - BOARD EVALUATION ADV7180EVAL-ADV7180LFEBZ - BOARD EVAL FOR ADV7180 LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADV7180BSTZ
Manufacturer:
AMIS
Quantity:
6 240
Company:
Part Number:
ADV7180BSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADV7180BSTZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
ADV7180BSTZ-REEL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Subaddress
0x0E
0x0F
0x10
0x11
0x12
0x13
Register
ADI Control 1
Power
management
Status 1
(read only)
IDENT
(read only)
Status 2
(read only)
Status 3
(read only)
Bit Description
Reserved
SUB_USR_EN; enables
user to access the interrupt/
VDP register map
Reserved
Reserved
PDBP; power-down bit
priority selects between
PWRDWN bit or pin control
Reserved
PWRDWN; power-down
places the decoder into a
full power-down mode
Reserved
Reset; chip reset, loads
all I
values
IN_LOCK
LOST_LOCK
FSC_LOCK
FOLLOW_PW
AD_RESULT[2:0]; auto-
detection result reports
the standard of the
input video
COL_KILL
IDENT[7:0]; provides
identification on the
revision of the part
MVCS DET
MVCS T3
MV PS DET
MV AGC DET
LL NSTD
FSC NSTD
Reserved
INST_HLOCK
GEMD
SD_OP_50Hz
Reserved
FREE_RUN_ACT
STD FLD LEN
Interlaced
PAL_SW_LOCK
2
C bits with default
7
0
0
1
x
0
x
x
(Shading Indicates Default State)
6
0
0
0
0
0
0
1
1
1
1
0
x
x
Rev. F | Page 85 of 116
5
0
1
0
1
0
0
1
1
0
0
1
1
0
x
x
4
0
0
0
1
0
1
0
1
1
x
x
1
0
Bits
3
0
0
x
1
x
x
2
0
0
1
x
1
x
0
1
1
0
0
x
0
x
x
0
0
0
x
0
x
x
Comments
Set as default
Access main register space
Access interrupt/VDP register space
Set as default
Set to default
Chip power-down controlled by pin
Bit has priority (pin disregarded)
System functional
Powered down
Normal operation
Start reset sequence
1 = in lock (now)
1 = lost lock (since last read)
1 = f
NTSM M/J
NTSC 4.43
PAL M
SECAM
PAL Combination N
SECAM 525
MV color striping detected
MV color striping type
MV pseudosync detected
MV AGC pulses detected
Nonstandard line length
f
1 = horizontal lock achieved
1 = Gemstar data detected
SD 60 Hz detected
SD 50 Hz detected
1 = free-run mode active
1 = interlaced video detected
1 = swinging burst detected
Set to default
Set to default
1 = peak white AGC mode active
PAL 60
PAL B/G/H/I/D
1 = color kill is active
1 = field length standard
SC
frequency nonstandard
SC
lock (now)
Notes
See Figure 53
Not applicable for
32-lead LFCSP
See PDBP,
0x0F Bit 2
Executing reset
takes approxi-
mately 2 ms; this
bit is self-clearing
Provides info
about the internal
status of the
decoder
Detected
standard
Power-up
value = 0x1C
1 = detected
0 = Type 2,
1 = Type 3
1 = detected
1 = detected
1 = detected
1 = detected
Unfiltered
SD field rate detect
Blue screen output
Correct field
length found
Field sequence
found
Reliable swinging
burst sequence
Color kill
ADV7180