ADV7180BSTZ Analog Devices Inc, ADV7180BSTZ Datasheet - Page 16
![IC VIDEO DECODER SDTV 64-LQFP](/photos/6/60/66065/505-64-lqfp_sml.jpg)
ADV7180BSTZ
Manufacturer Part Number
ADV7180BSTZ
Description
IC VIDEO DECODER SDTV 64-LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet
1.ADV7180BSTZ.pdf
(116 pages)
Specifications of ADV7180BSTZ
Design Resources
Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
Applications
Digital Cameras, Mobile Phones, Portable Video
Voltage - Supply, Analog
1.71 V ~ 1.89 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Resolution (bits)
10bit
Input Format
Analog
Output Format
Digital
Adc Sample Rate
57.27MSPS
Power Dissipation Pd
15µW
No. Of Input Channels
6
Supply Voltage Range
1.71V To 1.89V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADV7180LQEBZ - BOARD EVALUATION ADV7180EVAL-ADV7180LFEBZ - BOARD EVAL FOR ADV7180 LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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ADV7180
48-LEAD LQFP
Table 12. 48-Lead LQFP Pin Function Descriptions
Pin No.
1, 13, 19, 43
2, 4
3
5, 6, 41, 42
7 to 12, 20, 22
14
15, 48
16
17
18, 44
21
23, 28, 32
24
25
26, 27, 33 to 36
29
30
31
37
38
39
40
45
46
47
Mnemonic
DGND
DVDDIO
SFL
GPO0 to GPO3
P7 to P2, P1, P0
LLC
NC
XTAL1
XTAL
DVDD
PWRDWN
AGND
ELPF
PVDD
A
VREFP
VREFN
AVDD
RESET
ALSB
SDATA
SCLK
VS/FIELD
INTRQ
HS
IN
1 to A
IN
6
G
P
O
O
O
O
I
P
G
I
P
O
O
P
I
I/O
O
O
Type
O
I
I
I
I
O
NC = NO CONNECT
DVDDIO
DVDDIO
Description
Digital Ground.
Digital I/O Supply Voltage (1.8V to 3.3 V).
Subcarrier Frequency Lock. This pin contains a serial output stream that can be used to lock the
subcarrier frequency when this decoder is connected to any Analog Devices digital video encoder.
General-Purpose Outputs. These pins can be configured via I
Video Pixel Output Port. See Table 100 for output configuration for 8-bit and 16-bit modes.
This is a line-locked output clock for the pixel data output by the ADV7180. It is nominally
27 MHz but varies up or down according to video line length.
No Connect Pins. These pins are not connected internally.
This pin should be connected to the 28.6363 MHz crystal or left as a no connect if an external 1.8 V,
28.6363 MHz clock oscillator source is used to clock the ADV7180. In crystal mode, the crystal
must be a fundamental crystal.
This is the input pin for the 28.6363 MHz crystal, or this pin can be overdriven by an external 1.8 V,
28.6363 MHz clock oscillator source. In crystal mode, the crystal must be a fundamental crystal.
Digital Supply Voltage (1.8 V).
A logic low on this pin places the ADV7180 in power-down mode.
Analog Ground.
The recommended external loop filter must be connected to the ELPF pin, as shown in Figure 58.
PLL Supply Voltage (1.8 V).
Analog Video Input Channels.
Internal Voltage Reference Output. See Figure 58 for recommended output circuitry.
Internal Voltage Reference Output. See Figure 58 for recommended output circuitry.
Analog Supply Voltage (1.8 V).
System Reset Input. Active low. A minimum low reset pulse width of 5 ms is required to reset
the ADV7180 circuitry.
This pin selects the I
for a write is 0x40; for ALSB set to Logic 1, the address selected is 0x42.
I
I
Vertical Synchronization Output Signal/Field Synchronization Output Signal.
Interrupt Request Output. Interrupt occurs when certain signals are detected on the input video
(see Table 108).
Horizontal Synchronization Output Signal.
2
2
DGND
GPO1
GPO0
C Port Serial Data Input/Output Pin.
C Port Serial Clock Input. The maximum clock rate is 400 kHz.
SFL
P7
P6
P5
P4
P3
P2
Figure 11. 48-Lead LQFP Pin Configuration
10
12
11
1
2
3
4
5
6
7
8
9
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
Rev. F | Page 16 of 116
2
C address for the ADV7180. For ALSB set to Logic 0, the address selected
(Not to Scale)
ADV7180
TOP VIEW
LQFP
36
35
34
33
32
29
28
27
31
30
26
25
A
A
A
A
AGND
AVDD
VFEFN
VREFP
AGND
A
A
PVDD
IN
IN
IN
IN
IN
IN
6
5
4
3
2
1
2
C to allow control of external devices.