ADV7180BSTZ Analog Devices Inc, ADV7180BSTZ Datasheet - Page 65

• Manufacturer Part Number: ADV7180BSTZ
• Description: IC VIDEO DECODER SDTV 64-LQFP
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7180BSTZ

• Design Resources: Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
• Applications: Digital Cameras, Mobile Phones, Portable Video
• Voltage - Supply, Analog: 1.71 V ~ 1.89 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Resolution (bits): 10bit
• Input Format: Analog
• Output Format: Digital
• Adc Sample Rate: 57.27MSPS
• Power Dissipation Pd: 15µW
• No. Of Input Channels: 6
• Supply Voltage Range: 1.71V To 1.89V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADV7180LQEBZ - BOARD EVALUATION ADV7180EVAL-ADV7180LFEBZ - BOARD EVAL FOR ADV7180 LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

VPS/PDC/UTC/GEMSTAR
The readback registers for VPS, PDC, and UTC are shared.
Gemstar is a high data rate standard and is available only through
the ancillary stream. However, for evaluation purposes, any one
line of Gemstar is available through the I
same register space as PDC, UTC, and VPS. Therefore, only VPS,
PDC, UTC, or Gemstar can be read through the I
To identify the data that should be made available in the I
registers, the user must program I
(Register Address 0x9C, user sub map).
I
User Sub Map
Specifies which standard result is available for I
GS_PDC_VPS_UTC_CLEAR, GS/PDC/VPS/UTC Clear,
Address 0x78[4], User Sub Map, Write Only, Self-Clearing
Setting GS_PDC_VPS_UTC_CLEAR to 1 reinitializes the
GS/PDC/VPS/UTC data readback registers.
GS_PDC_VPS_UTC_AVL, GS/PDC/VPS/UTC Available,
Address 0x78[4], User Sub Map, Read Only
When GS_PDC_VPS_UTC_AVL is 0, no GS, PDC, VPS, or
UTC data was detected.
When GS_PDC_VPS_UTC_AVL is 1, one GS, PDC, VPS, or
UTC data was detected.
VDP_GS_VPS_PDC_UTC, Readback Registers,
Address 0x84 to Address 0x90
See Table 85 for information on the readback registers.
VPS
The VPS data bits are biphase decoded by the VDP. The decoded
data is available in both the ancillary stream and in the I
readback registers. VPS decoded data is available in the
VDP_GS_VPS_PDC_UTC_0 to VDP_VPS_PDC_UTC_12
registers (Address 0x84 to Address 0x90, User Sub Map). The
GS_PDC_VPS_UTC_AVL bit is set if the user programmed
I
Gemstar
The Gemstar-decoded data is made available in the ancillary
stream, and any one line of Gemstar is also available in the I
registers for evaluation purposes. To read Gemstar results
through the I
I
Table 84. I
I
00 (default)
01
10
11
2
2
2
2
C_GS_VPS_PDC_UTC[1:0]
C_GS_VPS_PDC_UTC to 01, as explained in Table 84.
C_GS_VPS_PDC_UTC to 00, as explained in Table 84.
C_GS_VPS_PDC_UTC[1:0] (VDP), Address 0x9C[7:6],
2
C_GS_VPS_PDC_UTC[1:0] Function
2
C registers, the user must program
2
C_GS_VPS_PDC_UTC[1:0]
Description
Gemstar 1×/2×
VPS
PDC
UTC
2
C registers sharing the
2
2
C at one time.
C readback.
2
C
2
C
2
Rev. F | Page 65 of 116
C
VDP supports autodetection of the Gemstar standard,
either Gemstar 1× or Gemstar 2×, and decodes accordingly.
For the autodetection mode to work, the user must set the
AUTO_DETECT_GS_TYPE bit (Register 0x61, user sub map)
and program the decoder to decode Gemstar 2× on the required
lines through line programming. The type of Gemstar decoded
can be determined by observing the GS_DATA_TYPE bit
(Register 0x78, user sub map).
AUTO_DETECT_GS_TYPE, Address 0x61[4], User Sub Map
Setting AUTO_DETECT_GS_TYPE to 0 (default) disables the
autodetection of the Gemstar type.
Setting AUTO_DETECT_GS_TYPE to 1 enables the
autodetection of the Gemstar type.
GS_DATA_TYPE, Address 0x78[5], User Sub Map, Read Only
Identifies the decoded Gemstar data type.
When GS_DATA_TYPE is 0, Gemstar 1× mode is detected.
Read two data bytes from 0x84.
When GS_DATA_TYPE is 1, Gemstar 2× mode is detected.
Read four data bytes from 0x84.
The Gemstar data that is available in the I
from any line of the input video on which Gemstar was decoded.
To read the Gemstar data on a particular video line, the user
should use the manual configuration described in Table 70 and
Table 71 and enable Gemstar decoding only on the required line.
PDC/UTC
PDC and UTC are data transmitted through Teletext Packet 8/30
Format 2 (Magazine 8, Row 30, Design Code 2 or Design Code 3)
and Packet 8/30 Format 1 (Magazine 8, Row 30, Design Code 0
or Design Code 1). Therefore, if PDC or UTC data is to be read
through I
System B) should be decoded by VDP. The whole teletext
decoded packet is output on the ancillary data stream. The user
can look for the magazine number, row number, and design
code and qualify the data as PDC, UTC, or neither of these.
If PDC/UTC packets are identified, Byte 0 to Byte 12 are updated
to the VDP_GS_VPS_PDC_UTC_0 to VDP_VPS_PDC_UTC_12
registers, and the GS_PDC_VPS_UTC_AVL bit is set. The full
packet data is also available in the ancillary data format.
Note that the data available in the I
status of the WST_PKT_DECODE_DISABLE bit (Bit 3,
Subaddress 0x60, user sub map).
2
C, the corresponding teletext standard (WST or PAL
2
C register depends on the
2
C register can be
ADV7180