MC9S12E128CPV Freescale Semiconductor, MC9S12E128CPV Datasheet - Page 232

Microcontrollers (MCU) 16 Bit 16MHz

MC9S12E128CPV

Manufacturer Part Number
MC9S12E128CPV
Description
Microcontrollers (MCU) 16 Bit 16MHz
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12E128CPV

Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
16 bit
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP-112
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 6 Analog-to-Digital Converter (ATD10B16CV2)
In either level or edge triggered modes, the first conversion begins when the trigger is received. In both
cases, the maximum latency time is one bus clock cycle plus any skew or delay introduced by the trigger
circuitry.
After ETRIGE is enabled, conversions cannot be started by a write to ATDCTL5, but rather must be
triggered externally.
If the level mode is active and the external trigger both de-asserts and re-asserts itself during a conversion
sequence, this does not constitute an overrun. Therefore, the flag is not set. If the trigger remains asserted
in level mode while a sequence is completing, another sequence will be triggered immediately.
6.4.2.2
The input channel pins can be multiplexed between analog and digital data. As analog inputs, they are
multiplexed and sampled to supply signals to the A/D converter. As digital inputs, they supply external
input data that can be accessed through the digital port registers (PORTAD0 & PORTAD1) (input-only).
The analog/digital multiplex operation is performed in the input pads. The input pad is always connected
to the analog inputs of the ATD10B16C. The input pad signal is buffered to the digital port registers. This
buffer can be turned on or off with the ATDDIEN0 & ATDDIEN1 register. This is important so that the
buffer does not draw excess current when analog potentials are presented at its input.
6.4.3
The ATD10B16C can be configured for lower MCU power consumption in three different ways:
232
Stop Mode
Stop Mode: This halts A/D conversion. Exit from Stop mode will resume A/D conversion, But due
to the recovery time the result of this conversion should be ignored.
Entering stop mode causes all clocks to halt and thus the system is placed in a minimum power
standby mode. This halts any conversion sequence in progress. During recovery from stop mode,
there must be a minimum delay for the stop recovery time t
conversion sequence.
Wait Mode
Wait Mode with AWAI = 1: This halts A/D conversion. Exit from Wait mode will resume A/D
conversion, but due to the recovery time the result of this conversion should be ignored.
Entering wait mode, the ATD conversion either continues or halts for low power depending on the
logical value of the AWAIT bit.
Freeze Mode
Writing ADPU = 0 (Note that all ATD registers remain accessible.): This aborts any A/D
conversion in progress.
In freeze mode, the ATD10B16C will behave according to the logical values of the FRZ1 and FRZ0
bits. This is useful for debugging and emulation.
Operation in Low Power Modes
General-Purpose Digital Input Port Operation
The reset value for the ADPU bit is zero. Therefore, when this module is
reset, it is reset into the power down state.
MC9S12E128 Data Sheet, Rev. 1.07
NOTE
SR
before initiating a new ATD
Freescale Semiconductor

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