TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 97

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

CGRSTFLG
7.6.3.7
Reset Flag Resister is a resister for reading internal Reset generation status per generation factors.
Since this register is not cleared automatically, it is necceary to write “0” to clear the register.
bit Symbol
Read/Write
After pin reset
Function
bit Symbol
Read/Write
After pin reset
Function
bit Symbol
Read/Write
After pin reset
Function
bit Symbol
Read/Write
After pin reset
Function
(Note 1)
(Note 2)
Reset Flag Register
This flag indicates a reset generated by the SYSRESETREQ bit of the Application
Interrupt and Reset Control Register of the CPU's NVIC.
This register is not cleared automatically. Write "0" to clear the register.
15
23
31
0
0
0
0
7
“0” is read.
R
14
22
30
0
0
0
0
6
TMPM370 7-59
OFD reset
flag
0：“0” is
written
1：Reset
from OFD
OFDRSTF
R/W
13
21
29
0
0
0
0
5
Debug reset
flag (Note 1)
0： “0” is
written
1：Reset
SYSRSTF VLTDRSTF WDTRSTF PINRSTF
from
debugger
R/W
12
20
28
0
0
0
4
0
“0” is read.
“0” is read.
“0” is read.
R
R
R
VLTD reset
flag.
0： “0” is
written
1：Reset
from
VLTD
R/W
11
19
27
0
0
0
3
0
WDT reset
flag
0：“0” is
written
1：Reset
from WDT
R/W
10
18
26
0
0
0
2
0
RESETpin
flag
0： “0” is
written
1：Reset
from
RESET
pin
R/W
17
25
0
0
0
1
0
9
TMPM370
Power On
Reset
flag
0： “0” is
written
1：Reset
PONRSTF
from
Power On
Reset
Interrupt
R/W
1 / 0
16
24
0
0
0
0
8