TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 16

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

4
4.1 Specification Overview
4.2 Features of SWJ-DP
4.3 Features of ETM
4.4 Pin Functions
Dubug Interface
TMS/SWDIO
TCK/SWCLK
TDO/SWV
TDI
------------------
TRACECLK
TRACEDATA0
TRACEDATA1
TRST
Table 4-1 SWJ-DP、ETM function
(Note)In case of enabling SWV function.
Debug Interface and the Embedded Trace Macrocell
output to the dedicated pins (TRACEDATA[0]-[1], SWV) via the on-chip Trace Port Interface Unit
(TPIU).
Port (TDI, TDO, TMS, TCK, TRST
trace output from SWV.
between the JTAG debug port function and the serial wire debug port function. The PB5 is shared
between the JTAG debug port function and the SWV trace output function.
functions of other debug interface pins need to be programmed as required. Debug interface pins
SWJ-DP
Pin name
The TMPM370 contains the Serial Wire JTAG Debug Port (SWJ-DP) unit for interfacing with the
For details about SWJ-DP, ETM and TPIU, refer to “Cortex-M3 Technical Reference Manual”.
SWJ-DP supports the two-pin Serial Wire Debug Port (SWDCK, SWDIO) and the JTAG Debug
The debug interface pins can also be used as general-purpose ports. The PB3 and PB4 are shared
After reset, the PB3, PB4, PB5, PB6 and PB7 are configured as debug port function pins. The
ETM supports two data signal pins (TRACEDATA[0]-[1]), one clock signal pin (TRACECLK) and
Name of
PB3
PB4
PB5
PB6
PB7
PB0
PB1
PB2
port
------------------
Output
Output
Output
Output
Input
Input
Input
Input
I/O
).
TMPM370 4-1
JTAG debug function
JTAG Test Mode
Selection
JTAG Test Check
JTAG Test Data Output
JTAG Test Data Input
JTAG Test RESET
Discription
TM
(ETM) unit for trace output. Trace data is
TRACE DATA Output0
TRACE DATA Output1
TRACE Clock Output
(Output)
Input
(Note)
I/O
I/O
－
－
－
SW debug
Serial Wire Data
Input/Output
( Ser ia l W ire
－
－
Serial Wire Clock
Dubug Interface
Viewer Output)
Discription
TMPM370