TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 288

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

16.3 PMD Circuit
The wave generation circuit includes a pulse width modulation circuit, a conduction control circuit, a
protection control circuit, a dead time control circuit.
Sync Trigger G eneration Circuit
Wave G eneration Circuit
The PMD circuit consists of two blocks of a wave generation circuit and a sync trigger generation circuit.
- The pulse width modulation circuit generates independent 3-phase PWM waveforms with the same
- The conduction control circuit determines the output pattern for each of the upper and lower sides of
- The protection control circuit controls emergency output stop by EMG input and OVV input.
- The dead time control circuit prevents a short circuit which may occur when the upper side and lower
- The sync trigger generation circuit generates sync trigger signals to the AD converter.
PWM frequency.
the U, V and W phases.
side are switched.
INTPWM
PMDnTRGCMP0
PMDnTRGCMP1
PMDnTRGCMP2
PMDnTRGCMP3
PMDnTRGCR
PMDnCMPW
PMDnMDPR
PMDnCMPU
PMDnCMPV
VE
VE
D
MDCNT
PMDnMDCR
Pulse Width
Generation
Modulati on
Trigger
Sync
Figure 16-2 Block diagram of PMD Circuit
POUTW
POUTU
POUTV
UPEQUS
DNEQUS
VE
PMDnMDOUT
TMPM370 16-4
PMDTRG0
PMDTRG1
PMDTRG2
PMDTRG3
PMDTRG4
PMDTRG5
Con duction
Control
pwmb.0
pwmb.1
pwmb.2
pwmb.3
pwmb.4
pwmb.5
PTENC
PMDnEMGCR
PMDnOVVCR
Protection
Control
PMDnEMGR
wo
uo
xo
vo
yo
zo
PMDnDTR
Control
Dead
Time
Motor control circuit
PMDnMDPOT
PORTEN
INTEMG
INTOVV
WO
EMG
UO
XO
VO
YO
ZO
OVV
TMPM370