TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 42

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

(3) Priority setting
(Note 1)
(Note 2)
(Note)
<PRI_n> bit in the system handler priority register.
varies from 3 bits to 8 bits depending on products. Thus, the range of priority values you can specify is
different depending on products.
priority is “0”. If multiple elements with the same priority exist, the smaller the number, the higher the
priority becomes.
7-10
16-
No
11
12
13
14
15
１
The external interrupt priority is set to the interrupt priority register and other exceptions are set to
The configuration <PRI_n> can be changed, and the number of bits required for setting the priority
In case of 8-bit configuration, the priority can be configured in the range from 0 to 255. The highest
2
3
4
5
6
Priority levels
Non-Maskable
Interrupt
Memory
Management
Bus Fault
Reserved
Reset
Hard Fault
Usage Fault
Reserved
SVCall
Debug Monitor
PendSV
SysTick
External Interrupt
<PRI_n> bit is dfined as a 3-bit configuration with this product.
Exception type
This product does not contain the MPU
External interrupts have different sources and numbers in each product. For details,
see “7.5.1.5 List of Interrupt Factors”.
Table 7-1 Exception Types and Priority
Configurable
Configurable
Configurable
-3 (highest)
-2
-1
Configurable
Configurable
Configurable
Configurable
Configurable
Priority
TMPM370 7-4
Description
Reset pin, WDT ,POR, VLTD, OFD or SYSRESETREQ
WDT
Fault that cannot activate because a higher-priority
fault is being handled or it is disabled
Exception from the Memory Protection Unit (MPU)
(Note 1)
Instruction fetch from the Execute Never (XN) region
Access violation to the Hard Fault region of the
memory map
Undefined instruction execution or other faults related
to instruction execution
Debug monitor when the core is not halting
Notification from system timer
Configurable External interrupt pin or peripheral
function (Note 2)
System service call with SVC instruction
Pendable system service request
TMPM370
Interrupt