TDGL003 Microchip Technology, TDGL003 Datasheet - Page 60

ChipKIT Max32 Development Board PIC32 Boards And Kits

TDGL003

Manufacturer Part Number
TDGL003
Description
ChipKIT Max32 Development Board PIC32 Boards And Kits
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Type
MCUr
Datasheets

Specifications of TDGL003

Silicon Manufacturer
Microchip
Core Architecture
MIPS
Core Sub-architecture
PIC32
Silicon Core Number
PIC32MX
Silicon Family Name
PIC32MX795Fxxxx
Kit Contents
Board Only
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
MPLAB®, Arduino™ Mega
TABLE 4-11:
Legend:
Note
6000 U1MODE
6010
6020
6030
6040
6200 U2MODE
6210
6220
6230
6240
1:
U1TXREG
U1RXREG
U2TXREG
U2RXREG
U1BRG
U2BRG
U1STA
U2STA
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
This register has corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See
(1)
(1)
(1)
(1)
(1)
(1)
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
UART1-2 REGISTERS MAP
31/15
ON
UTXISEL<1:0>
ON
UTXISEL<1:0>
30/14
UTXINV
UTXINV
29/13
SIDL
SIDL
URXEN
URXEN
28/12
IREN
IREN
UTXBRK
UTXBRK
RTSMD
RTSMD
27/11
UTXEN
UTXEN
26/10
UTXBF
UTXBF
25/9
UEN<1:0>
UEN<1:0>
ADM_EN
ADM_EN
TRMT
TRMT
24/8
RX8
RX8
TX8
TX8
BRG<15:0>
BRG<15:0>
Bits
WAKE
WAKE
23/7
URXISEL<1:0>
URXISEL<1:0>
LPBACK
LPBACK
22/6
Section 12.1.1 “CLR, SET and INV Registers”
ABAUD
ADDEN
ABAUD
ADDEN
21/5
RXINV
RXINV
RIDLE
RIDLE
Transmit Register
Transmit Register
20/4
Receive Register
Receive Register
ADDR<7:0>
ADDR<7:0>
BRGH
BRGH
PERR
PERR
19/3
FERR
FERR
18/2
PDSEL<1:0>
PDSEL<1:0>
for more information.
OERR
OERR
17/1
URXDA
URXDA
STSEL
STSEL
16/0
0000
0000
0000
0110
0000
0000
0000
0000
0000
0000
0000
0000
0000
0110
0000
0000
0000
0000
0000
0000

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