IDT82V2041EPP IDT, Integrated Device Technology Inc, IDT82V2041EPP Datasheet - Page 40
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IDT82V2041EPP
Manufacturer Part Number
IDT82V2041EPP
Description
IC LIU T1/J1/E1 1CH 44-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Line Interface Units (LIUs)r
Datasheet
1.IDT82V2041EPP8.pdf
(75 pages)
Specifications of IDT82V2041EPP
Protocol
E1
Voltage - Supply
3.13 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
82V2041EPP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT82V2041EPP
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT82V2041EPP8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT82V2041EPPG
Manufacturer:
IDT
Quantity:
351
Company:
Part Number:
IDT82V2041EPPG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT82V2041EPPG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
4.3.2
Table-25 TCF0: Transmitter Configuration Register 0
Table-26 TCF1: Transmitter Configuration Register 1
Programming Information
IDT82V2041E
1. In internal impedance matching mode, for E1/75 Ω cable impedance, the PULS[3:0] bits ( TCF1, 06H ) should be set to ‘0000’. In external impedance matching mode, for E1/75 Ω cable
DFM_OFF
PULS[3:0]
TCLK_SEL
T_MD[1:0]
impedance, the PULS[3:0] bits should be set to ‘0001’.
Symbol
Symbol
TD_INV
T_OFF
THZ
TRANSMIT PATH CONTROL REGISTERS
-
-
(R/W, Address = 05H)
(R/W, Address = 06H)
7-6
3-0
Bit
5
4
7-5
0-1
Bit
4
3
2
Default
0000
00
1
0
Default
000
00
0
0
0
Reserved. This bit should be ‘0’ for normal operation.
Transmit driver failure monitor disable
= 0: DFM is enabled
= 1: DFM is disabled
Transmit line driver high impedance enable
= 0: Normal state
= 1: Transmit line driver high impedance enable (other transmit path still work normally)
These bits select the transmit template:
1000 - 1011
0000
11XX
0001
0010
0011
0100
0101
0110
0111
Reserved.
Transmitter power down enable
= 0: Transmitter power up
= 1: Transmitter power down (line driver high impedance)
Transmit data invert
= 0: Data on TD or TDP/TDN is active high
= 1: Data on TD or TDP/TDN is active low
Transmit clock edge select
= 0: Data on TDP/TDN is sampled on the falling edge of TCLK
= 1: Data on TDP/TDN is sampled on the rising edge of TCLK
Transmitter operation mode control
T_MD[1:0] select different stages of the transmit data path
= 00: Enable HDB3/B8ZS encoder and waveform shaper blocks. Input on pin TD is single rail NRZ data
= 01: Enable AMI encoder and waveform shaper blocks. Input on pin TD is single rail NRZ data
= 1x: Encoder is bypassed, dual rail NRZ transmit data input on pin TDP/TDN
1
T1/E1/J1
DSX1
DSX1
DSX1
DSX1
DSX1
E1
E1
J1
SINGLE CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
40
2.048 MHz
2.048 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
TCLK
User programmable waveform setting
Description
Description
Cable impedance
Reserved
120 Ω
100 Ω
100 Ω
100 Ω
100 Ω
100 Ω
110 Ω
75 Ω
Cable range
133-266 ft
266-399 ft
399-533 ft
533-655 ft
0-133 ft
0-655 ft
-
-
December 9, 2005
Allowable Cable loss
0.6-1.2 dB
1.2-1.8 dB
1.8-2.4 dB
2.4-3.0 dB
0-0.6 dB
0-3.0 dB
0-24 dB
0-24 dB