IDT82V2041EPP IDT, Integrated Device Technology Inc, IDT82V2041EPP Datasheet - Page 35

• Manufacturer Part Number: IDT82V2041EPP
• Description: IC LIU T1/J1/E1 1CH 44-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Line Interface Units (LIUs)r

Specifications of IDT82V2041EPP

• Protocol: E1
• Voltage - Supply: 3.13 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82V2041EPP

3.12 MICROCONTROLLER INTERFACES
isters in the device. The chip supports serial microcontroller interface and
two kinds of parallel microcontroller interface: Motorola multiplexed mode
and Intel multiplexed mode. Different microcontroller interfaces can be
selected by setting MODE[1:0] pins to different values. Refer to
and
acteristics
3.13 INTERRUPT HANDLING
When the INT_PIN[0] bit (GCF, 02H) is ‘0’, the
low, with a 10 KΩ external pull-up resistor. When the INT_PIN[1:0] bits
(GCF, 02H) are ‘01’, the
INT_PIN[1:0] bits are ‘10’, the
IDT82V2041E.
Status Register (INTS0, 19H) or (INTS1, 1AH). Every kind of interrupt can
be enabled/disabled individually by the corresponding bit in the register
(INTM0, 14H) or (INTM1, 15H). Some event is reflected by the correspond-
ing bit in the Status Register (STAT0, 17H) or (STAT1, 18H), and the Inter-
rupt Trigger Edge Selection Register can be used to determine how the
Status Register sets the Interrupt Status Register.
the
Functional Description
IDT82V2041E
The microcontroller interface provides access to read and write the reg-
All kinds of interrupt of the IDT82V2041E are indicated by the
An active level on the
The interrupt event is captured by the corresponding bit in the Interrupt
After the Interrupt Status Register (INTS0, 19H) or (INTS1, 1AH) is read,
INT
MODE0
pin become inactive.
for details.
in pin description and
SCLK
CS
SDI
SDO
INT
INT
INT
A0
pin is push-pull active low; when the
pin is push-pull active high.
Microcontroller Interface Timing Char-
pin represents an interrupt of the
Figure-19 Serial Microcontroller Interface Function Timing
A1
remains high impedance
address/command byte
A2
INT
A3
pin is open drain active
A4
R/W
MODE1
-
INT
pin.
-
SINGLE CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
35
D0
D0
3.12.1 PARALLEL MICROCONTROLLER INTERFACE
MODE[1:0] pins are set to ‘10’, Parallel-Multiplexed-Motorola interface is
selected. When MODE[1:0] pins are set to ‘11’, Parallel-Multiplexed-Intel
Interface is selected.
3.12.2 SERIAL MICROCONTROLLER INTERFACE
mode, the registers are programmed through a 16-bit word which contains
an 8-bit address/command byte (5 address bits A0~A4 and bit R/W) and
an 8-bit data byte (D0~D7). When bit R/W is ‘1’, data is read out from pin
SDO. When bit R/W is ‘0’, data is written into SDI pin. Refer to Figure-19.
source:
bit, Interrupt Status bit, Interrupt Trigger Edge Selection bit and Interrupt
Mask bit.
input data byte (R/W=0)
D1
The interface is compatible with Motorola or Intel microcontroller. When
When MODE[1:0] pins are set to ‘01’, Serial Interface is selected. In this
D1 D2
There are totally thirteen kinds of events that could be the interrupt
(1).LOS Detected
(2).AIS Detected
(3).Driver Failure Detected
(4).TCLK Loss
(5).Synchronization Status of PRBS
(6).PRBS Error Detected
(7).Code Violation Received
(8).Excessive Zeros Received
(9).JA FIFO Overflow/Underflow
(10).Inband Loopback Code Status
(11).One-Second Timer Expired
(12).Error Counter Overflow
(13).Arbitrary Waveform Generator Overflow
Table-18
output data byte (R/W=1)
D2
is a summary of all kinds of interrupt and the associated Status
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
December 9, 2005