ADAV801ASTZ Analog Devices Inc, ADAV801ASTZ Datasheet - Page 9

• Manufacturer Part Number: ADAV801ASTZ
• Description: IC CODEC AUDIO R-DVD 3.3V 64LQFP
• Manufacturer: Analog Devices Inc
• Type: Audio Codecr

Specifications of ADAV801ASTZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 102 / 101
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 2
• No. Of Output Channels: 2
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 102dB
• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 3.6V
• Package Type: LQFP
• Adc/dac Resolution: 24b
• Interface Type: Serial (SPI)
• Mounting: Surface Mount
• Number Of Adc's: 2
• Number Of Dac's: 2
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 64
• Power Supply Type: Analog/Digital
• Sample Rate: 96KSPS
• Screening Level: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADAV801EBZ - BOARD EVALUATION FOR ADAV801
• Lead Free Status / Rohs Status: Compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Mnemonic
VINR
VINL
AGND
AVDD
DIR_LF
DIR_GND
DIR_VDD
RESET
CLATCH
CIN
CCLK
COUT
ZEROL/INT
ZEROR
DVDD
DGND
ILRCLK
IBCLK
ISDATA
OLRCLK
OBCLK
OSDATA
DIRIN
ODVDD
ODGND
DITOUT
I/O
I
I
I
I
I
I
O
O
O
I/O
I/O
I
I/O
I/O
O
I
O
ZEROL/INT
NC = NO CONNECT
DIR_GND
DIR_VDD
CLATCH
DIR_LF
ZEROR
RESET
AGND
DGND
COUT
DVDD
AVDD
CCLK
Analog Audio Input, Left Channel.
Supply for DIR Analog Section. This pin should be connected to AVDD.
VINR
Description
Analog Audio Input, Right Channel.
Analog Ground.
Analog Voltage Supply.
DIR Phase-Locked Loop (PLL) Filter Pin.
Supply Ground for DIR Analog Section. This pin should be connected to AGND.
Asynchronous Reset Input (Active Low).
Chip Select (Control Latch) Pin of SPI-Compatible Control Interface.
Data Input of SPI-Compatible Control Interface.
Clock Input of SPI-Compatible Control Interface.
Data Output of SPI-Compatible Control Interface.
Left Channel (Output) Zero Flag or Interrupt (Output) Flag. The function of this pin is determined
by the INTRPT bit in DAC Control Register 4.
Right Channel (Output) Zero Flag.
Digital Voltage Supply.
Digital Ground.
Sampling Clock (LRCLK) of Playback Digital Input Port.
Serial Clock (BCLK) of Playback Digital Input Port.
Data Input of Playback Digital Input Port.
Sampling Clock (LRCLK) of Record Digital Output Port.
Serial Clock (BCLK) of Record Digital Output Port.
Data Output of Record Digital Output Port.
Input to Digital Input Receiver (S/PDIF).
Interface Digital Voltage Supply.
Interface Digital Ground.
S/PDIF Output from DIT.
VINL
CIN
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
17 18 19 20 21 22 23 24
64 63 62 61 60 59 58
PIN 1
INDICATOR
Figure 2. ADAV801 Pin Configuration
Rev. A | Page 9 of 60
(Not to Scale)
ADAV801
TOP VIEW
57 56 55 54 53 52 51 50 49
25 26 27
28
29
30
31
32
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
ADVDD
ADGND
PLL_LF2
PLL_LF1
PLL_GND
PLL_VDD
DGND
SYSCLK1
SYSCLK2
SYSCLK3
XIN
XOUT
MCLKO
MCLKI
DVDD
DGND
ADAV801