ADAV801ASTZ Analog Devices Inc, ADAV801ASTZ Datasheet - Page 47

• Manufacturer Part Number: ADAV801ASTZ
• Description: IC CODEC AUDIO R-DVD 3.3V 64LQFP
• Manufacturer: Analog Devices Inc
• Type: Audio Codecr

Specifications of ADAV801ASTZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 102 / 101
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 2
• No. Of Output Channels: 2
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 102dB
• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 3.6V
• Package Type: LQFP
• Adc/dac Resolution: 24b
• Interface Type: Serial (SPI)
• Mounting: Surface Mount
• Number Of Adc's: 2
• Number Of Dac's: 2
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 64
• Power Supply Type: Analog/Digital
• Sample Rate: 96KSPS
• Screening Level: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADAV801EBZ - BOARD EVALUATION FOR ADAV801
• Lead Free Status / Rohs Status: Compliant

DAC Control Register 2—Address 1100101 (0x65)
Table 98. DAC Control Register 2 Bit Map
7
Reserved
Table 99. DAC Control Register 2 Bit Descriptions
Bit Name
DMCLK[1:0]
DFS[1:0]
DEEM[1:0]
DAC Control Register 3—Address 1100110 (0x66)
Table 100. DAC Control Register 3 Bit Map
7
Reserved
Table 101. DAC Control Register 3 Bit Descriptions
Bit Name
ZFVOL
ZFDATA
ZFPOL
6
Reserved
6
Reserved
Description
DAC zero flag on mute and zero volume.
DAC zero flag on zero data disable.
DAC zero flag polarity.
Description
DAC MCLK divider.
DAC interpolator select.
DAC de-emphasis select.
0 = Enabled.
1 = Disabled.
0 = Enabled.
1 = Disabled.
0 = Active low.
1 = Active high.
00 = MCLK.
01 = MCLK/1.5.
10 = MCLK/2.
11 = MCLK/3.
00 = 8 × (MCLK = 256 × f
01 = 4 × (MCLK = 128 × f
10 = 2 × (MCLK = 64 × f
11 = Reserved.
00 = None.
01 = 44.1 kHz.
10 = 32 kHz.
11 = 48 kHz.
5
DMCLK1
5
Reserved
S
).
S
S
).
).
4
DMCLK0
4
Reserved
Rev. A | Page 47 of 60
3
DFS1
3
Reserved
2
DFS0
2
ZFVOL
1
DEEM1
1
ZFDATA
0
DEEM0
0
ZFPOL
ADAV801