ADAV801ASTZ Analog Devices Inc, ADAV801ASTZ Datasheet - Page 10

• Manufacturer Part Number: ADAV801ASTZ
• Description: IC CODEC AUDIO R-DVD 3.3V 64LQFP
• Manufacturer: Analog Devices Inc
• Type: Audio Codecr

Specifications of ADAV801ASTZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 102 / 101
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 2
• No. Of Output Channels: 2
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 102dB
• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 3.6V
• Package Type: LQFP
• Adc/dac Resolution: 24b
• Interface Type: Serial (SPI)
• Mounting: Surface Mount
• Number Of Adc's: 2
• Number Of Dac's: 2
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 64
• Power Supply Type: Analog/Digital
• Sample Rate: 96KSPS
• Screening Level: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADAV801EBZ - BOARD EVALUATION FOR ADAV801
• Lead Free Status / Rohs Status: Compliant

ADAV801
Pin No.
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Mnemonic
OAUXLRCLK
OAUXBCLK
OAUXSDATA
IAUXLRCLK
IAUXBCLK
IAUXSDATA
DGND
DVDD
MCLKI
MCLKO
XOUT
XIN
SYSCLK3
SYSCLK2
SYSCLK1
DGND
PLL_VDD
PLL_GND
PLL_LF1
PLL_LF2
ADGND
ADVDD
VOUTR
NC
VOUTL
NC
AVDD
AGND
FILTD
AGND
VREF
AGND
AVDD
CAPRN
CAPRP
AGND
CAPLP
CAPLN
I/O
I/O
I/O
O
I/O
I/O
I
I
O
I
I
O
O
O
O
O
Description
Sampling Clock (LRCLK) of Auxiliary Digital Output Port.
Serial Clock (BCLK) of Auxiliary Digital Output Port.
Data Output of Auxiliary Digital Output Port.
Sampling Clock (LRCLK) of Auxiliary Digital Input Port.
Serial Clock (BCLK) of Auxiliary Digital Input Port.
Data Input of Auxiliary Digital Input Port.
Digital Ground.
Digital Supply Voltage.
External MCLK Input.
Oscillator Output.
Crystal Input.
Crystal or External MCLK Input.
System Clock 3 (from PLL2).
System Clock 2 (from PLL2).
System Clock 1 (from PLL1).
Digital Ground.
Supply for PLL Analog Section. This pin should be connected to AVDD.
Ground for PLL Analog Section. This pin should be connected to AGND.
Loop Filter for PLL1.
Loop Filter for PLL2.
Analog Ground (Mixed Signal). This pin should be connected to AGND.
Analog Voltage Supply (Mixed Signal). This pin should be connected to AVDD.
Right Channel Analog Output.
No Connect.
Left Channel Analog Output.
No Connect.
Analog Voltage Supply.
Analog Ground.
Output DAC Reference Decoupling.
Analog Ground.
Voltage Reference Voltage.
Analog Ground.
Analog Voltage Supply.
ADC Modulator Input Filter Capacitor (Right Channel, Negative).
ADC Modulator Input Filter Capacitor (Right Channel, Positive).
Analog Ground.
ADC Modulator Input Filter Capacitor (Left Channel, Positive).
ADC Modulator Input Filter Capacitor (Left Channel, Negative).
Rev. A | Page 10 of 60