ADAV801ASTZ Analog Devices Inc, ADAV801ASTZ Datasheet - Page 48

• Manufacturer Part Number: ADAV801ASTZ
• Description: IC CODEC AUDIO R-DVD 3.3V 64LQFP
• Manufacturer: Analog Devices Inc
• Type: Audio Codecr

Specifications of ADAV801ASTZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 102 / 101
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 2
• No. Of Output Channels: 2
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 102dB
• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 3.6V
• Package Type: LQFP
• Adc/dac Resolution: 24b
• Interface Type: Serial (SPI)
• Mounting: Surface Mount
• Number Of Adc's: 2
• Number Of Dac's: 2
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 64
• Power Supply Type: Analog/Digital
• Sample Rate: 96KSPS
• Screening Level: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADAV801EBZ - BOARD EVALUATION FOR ADAV801
• Lead Free Status / Rohs Status: Compliant

ADAV801
DAC Control Register 4—Address 1100111 (0x67)
Table 102. DAC Control Register 4 Bit Map
7
Reserved
Table 103. DAC Control Register 4 Bit Descriptions
Bit Name
INTRPT
ZEROSEL[1:0]
DAC Left Volume—Address 1101000 (0x68)
Table 104. DAC Left Volume Register Bit Map
7
DVOLL7
Table 105. DAC Left Volume Register Bit Descriptions
Bit Name
DVOLL[7:0]
DAC Right Volume—Address 1101001 (0x69)
Table 106. DAC Right Volume Register Bit Map
7
DVOLR7
Table 107. DAC Right Volume Register Bit Descriptions
Bit Name
DVOLR[7:0]
DAC Left Peak Volume—Address 1101010 (0x6A)
Table 108. DAC Left Peak Volume Register Bit Map
7
Reserved
Table 109. DAC Left Peak Volume Register Bit Descriptions
Bit Name
DLP[5:0]
6
INTRPT
6
DVOLL6
6
DVOLR6
6
Reserved
Description
This bit selects the functionality of the ZEROL/INT pin.
These bits control the functionality of the ZEROR pin when the ZEROL/INT pin is used as an interrupt.
DAC right channel volume control.
DAC left channel peak volume detection.
Description
DAC left channel volume control.
Description
Description
0 = Pin functions as a ZEROL flag pin.
1 = Pin functions as an interrupt pin.
00 = Pin functions as a ZEROR flag pin.
01 = Pin functions as a ZEROL flag pin.
10 = Pin is asserted when either the left or right channel is zero.
11 = Pin is asserted when both the left and right channels are zero.
1111111 = 0 dBFS.
1111110 = −0.375 dBFS.
0000000 = −95.625 dBFS.
000000 = 0 dBFS.
000001 = −1 dBFS.
111111 = −63 dBFS.
1111111 = 0 dBFS.
1111110 = −0.375 dBFS.
0000000 = −95.625 dBFS.
5
ZEROSEL1
5
DVOLL5
5
DVOLR5
5
DLP5
4
ZEROSEL0
4
DVOLL4
4
DVOLR4
4
DLP4
Rev. A | Page 48 of 60
3
Reserved
3
DVOLL3
3
DVOLR3
3
DLP3
2
Reserved
2
DVOLL2
2
DVOLR2
2
DLP2
1
Reserved
1
DVOLL1
1
DVOLR1
1
DLP1
0
Reserved
0
DVOLL0
0
DVOLR0
0
DLP0