DP8344BV National Semiconductor, DP8344BV Datasheet - Page 106

• Manufacturer Part Number: DP8344BV
• Description: IC BIPHASE COMM PROCESSR 84-PLCC
• Manufacturer: National Semiconductor

Specifications of DP8344BV

• Processor Type: 8-Bit RISC
• Speed: 20MHz
• Voltage: 4.5 ~ 5.5V
• Mounting Type: Surface Mount
• Package / Case: 84-PLCC
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: *DP8344BV

t
t
t
t
t
t
t
t
t
t
t
t
t
t
W-RST
PD-RST-ICLK
SU-ALE-WT
H-WT-ALE
PD-WT-RDWR
SU-RRW-RST
H-RST-RRW
SU-LK-ICLK
PD-LK-ALE
SU-WT-ICLK
H-WT-ICLK
H-LK-ICLK
PD-AD-ALE
SU-WT-ALEf
5 0 Device Specifications
Note 1 All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing
specification may lead to invalid results
Note 2 The maximum value for this parameter is the lastest WAIT can be removed without adding an additional T-state The formula assumes a minimum
externally generated wait of one T-state
Note 3 If t
Note 4 The formula(s) apply to a 2 T-state instruction For a 3 T-state instruction add one T-state for a 4 T-state instruction add two T-states
Symbol
SU-LK-ICLK
ID
10
11
12
13
14
1
2
3
4
5
6
7
8
9
is not met the maximum time from LOCK low till no more local accesses is (MAX(n
RESET Low
RESET Rising to ICLK Rising
WAIT Low after ALE High to Extend Cycle
WAIT Rising after ALE Falling (Note 2)
WAIT Rising to READ or WRITE Rising
REM-RD REM-WR Low to RESET
Rising for BCP to Start
REM-RD REM-WR Low after RESET
Rising for BCP to Start
LOCK Low before ICLK High (Note 3)
LOCK High to ALE Low
WAIT Low after ICLK Rising to Extend Cycle
(Note 4)
WAIT High after ICLK Rising (Notes 2 4)
LOCK Rising after ICLK High
AD to ALE Falling after LOCK Rising
WAIT Low before ALE Falling to Extend Cycle
Parameter
TABLE 5-10 Control Pin Timing (Note 1)
(Continued)
106
(MAX(n
(MAX(n
(MAX(n
(MAX(n
(MAX(n
DW
DW
DW
DW
DW
n
2T
n
Formula
T
IW
DW
IW
n
n
a
T
5T
4T
T
3T
n
a
T
T
IW
IW
b
b
H
IW
L
T
a
a
n
T
a
a
a
a
a
b
b
1)
L
IW
1)
b
L
a
a
1))T
1))T
b
a
a
1)
1)
1)T
1)T
a
a
a
a
1)T
3)T
a
a
T
T
H
H
T
a
a
a
H
a
b
b
Min
b
15
19
23
0
0
5
2
2
22
33
2
b
b
b
b
Max
20
0
2
21
28
22
20
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns