MC8641DVU1333JE Freescale Semiconductor, MC8641DVU1333JE Datasheet - Page 78

• Manufacturer Part Number: MC8641DVU1333JE
• Description: IC MPU DUAL CORE E600 1023FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC8641DVU1333JE

• Processor Type: MPC86xx PowerPC 32-Bit
• Speed: 1.333GHz
• Voltage: 1.05V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCCBGA
• Family Name: MPC8xxx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 1.333GHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.05V
• Operating Supply Voltage (max): 1.1V
• Operating Supply Voltage (min): 1V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1023
• Package Type: FCCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Serial RapidIO
15.2
Table 51
15.3
LP-Serial links use differential signaling. This section defines terms used in the description and
specification of differential signals.
waveforms for either a transmitter output (TD and TD) or a receiver input (RD and RD). Each signal
swings between A Volts and B Volts where A > B. Using these waveforms, the definitions are as follows:
78
Symbol
t
t
REFCJ
REFPJ
t
REF
1. The transmitter output signals and the receiver input signals TD, TD, RD and RD each have a
2. The differential output signal of the transmitter, V
3. The differential input signal of the receiver, V
4. The differential output signal of the transmitter and the differential input signal of the receiver
5. The peak value of the differential transmitter output signal and the differential receiver input
6. The peak-to-peak value of the differential transmitter output signal and the differential receiver
peak-to-peak swing of A – B Volts
each range from A – B to –(A – B) Volts
signal is A – B Volts
input signal is 2 * (A – B) Volts
A Volts
B Volts
REFCLK cycle time
REFCLK cycle-to-cycle jitter. Difference in the
period of any two adjacent REFCLK cycles
Phase jitter. Deviation in edge location with
respect to mean edge location
lists AC requirements.
AC Requirements for Serial RapidIO SD n _REF_CLK and
SD n _REF_CLK
Signal Definitions
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Parameter Description
Figure 53. Differential Peak-Peak Voltage of Transmitter or Receiver
Table 51. SD n _REF_CLK and SD n _REF_CLK AC Requirements
TD or RD
TD or RD
Figure 53
Differential Peak-Peak = 2 * (A-B)
shows how the signals are defined. The figures show
Min
–40
—
—
ID
Typical Max Units
10(8)
, is defined as V
—
—
OD
, is defined as V
80
40
—
ns
ps
ps
RD
8 ns applies only to serial RapidIO
with 125-MHz reference clock
–V
TD
RD
–V
TD
Freescale Semiconductor
Comments
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