MC8641DVU1333JE Freescale Semiconductor, MC8641DVU1333JE Datasheet - Page 73
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MC8641DVU1333JE
Manufacturer Part Number
MC8641DVU1333JE
Description
IC MPU DUAL CORE E600 1023FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC8641DHX1000GE.pdf
(130 pages)
Specifications of MC8641DVU1333JE
Processor Type
MPC86xx PowerPC 32-Bit
Speed
1.333GHz
Voltage
1.05V
Mounting Type
Surface Mount
Package / Case
1023-FCCBGA
Family Name
MPC8xxx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
1.333GHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.05V
Operating Supply Voltage (max)
1.1V
Operating Supply Voltage (min)
1V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1023
Package Type
FCCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC8641DVU1333JE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
14.4.2
The TX eye diagram in
Figure
There are two eye diagrams that must be met for the transmitter. Both eye diagrams must be aligned in
time using the jitter median to locate the center of the eye diagram. The different eye diagrams will differ
in voltage depending whether it is a transition bit or a de-emphasized bit. The exact reduced voltage level
of the de-emphasized bit will always be relative to the transition bit.
The eye diagram must be valid for any 250 consecutive UIs.
A recovered TX UI is calculated over 3500 consecutive unit intervals of sample data. The eye diagram is
created using all edges of the 250 consecutive UI in the center of the 3500 UI used for calculating the TX
UI.
Freescale Semiconductor
52) in place of any real PCI Express interconnect + RX component.
Figure 50. Minimum Transmitter Timing and Voltage Output Compliance Specifications
Transmitter Compliance Eye Diagrams
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
It is recommended that the recovered TX UI is calculated using all edges in
the 3500 consecutive UI interval with a fit algorithm using a minimization
merit function (that is, least squares and median deviation fits).
Figure 50
is specified using the passive compliance/test measurement load (see
NOTE
PCI Express
73