MC8641DVU1333JE Freescale Semiconductor, MC8641DVU1333JE Datasheet - Page 36

• Manufacturer Part Number: MC8641DVU1333JE
• Description: IC MPU DUAL CORE E600 1023FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC8641DVU1333JE

• Processor Type: MPC86xx PowerPC 32-Bit
• Speed: 1.333GHz
• Voltage: 1.05V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCCBGA
• Family Name: MPC8xxx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 1.333GHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.05V
• Operating Supply Voltage (max): 1.1V
• Operating Supply Voltage (min): 1V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1023
• Package Type: FCCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

At recommended operating conditions with L/TV
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
8.2.3.2
Table 31
Figure 14
Figure 15
36
RX_CLK clock period 10 Mbps
RX_CLK clock period 100 Mbps
RX_CLK duty cycle
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise time (20%-80%)
RX_CLK clock fall time (80%-20%)
Note:
1. The symbols used for timing specifications herein follow the pattern of t
2. Guaranteed by design.
3. ±100 ppm tolerance on RX_CLK frequency
for inputs and t
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
going to the high (H) state or setup time. Also, t
signals (D) went invalid (X) relative to the t
the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
example, the subscript of t
with the appropriate letter: R (rise) or F (fall).
provides the MII receive AC timing specifications.
provides the AC test load for eTSEC.
shows the MII receive AC timing diagram.
MII Receive AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Parameter/Condition
RXD[3:0]
RX_CLK
RX_DV
RX_ER
Output
MRX
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
Table 31. MII Receive AC Timing Specifications
Figure 15. MII Receive AC Timing Diagram
t
t
MRXH
MRDVKH
DD
MRX
Figure 14. eTSEC AC Test Load
of 3.3 V ± 5%.
t
MRX
clock reference (K) going to the low (L) state or hold time. Note that, in general,
Z
MRDXKL
0
= 50 Ω
Valid Data
symbolizes MII receive timing (GR) with respect to the time data input
t
Symbol
MRXH
t
t
t
MRXF
t
MRDVKH
MRDXKH
t
t
MRX
t
MRXR
MRXF
MRX
/t
for outputs. For example, t
2,3
MRX
3
2
2
(first two letters of functional block)(signal)(state) (reference)(state)
1
R
t
MRDXKL
t
L
MRXR
= 50 Ω
10.0
10.0
Min
1.0
1.0
—
—
35
LV
DD
Typ
400
MRDVKH
40
—
—
—
—
—
/2
MRX
Freescale Semiconductor
symbolizes MII receive
clock reference (K)
Max
4.0
4.0
65
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
%