MC8641DVU1333JE Freescale Semiconductor, MC8641DVU1333JE Datasheet - Page 42

• Manufacturer Part Number: MC8641DVU1333JE
• Description: IC MPU DUAL CORE E600 1023FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC8641DVU1333JE

• Processor Type: MPC86xx PowerPC 32-Bit
• Speed: 1.333GHz
• Voltage: 1.05V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCCBGA
• Family Name: MPC8xxx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 1.333GHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.05V
• Operating Supply Voltage (max): 1.1V
• Operating Supply Voltage (min): 1V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1023
• Package Type: FCCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

At recommended operating conditions with L/TV
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
8.2.7.2
REF_CLK clock period
REF_CLK duty cycle
REF_CLK peak-to-peak jitter
Rise time REF_CLK (20%–80%)
Fall time REF_CLK (80%–20%)
RXD[1:0], CRS_DV, RX_ER setup time to REF_CLK rising
edge
RXD[1:0], CRS_DV, RX_ER hold time to REF_CLK rising
edge
Note:
1. The symbols used for timing specifications herein follow the pattern of t
Figure 21
Figure 22
42
for inputs and t
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
to the high (H) state or setup time. Also, t
(D) went invalid (X) relative to the t
clock reference symbol representation is based on three letters representing the clock of a particular functional. For example,
the subscript of t
appropriate letter: R (rise) or F (fall).
provides the AC test load for eTSEC.
shows the RMII receive AC timing diagram.
RMII Receive AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
REF_CLK
MRX
Parameter/Condition
RXD[1:0]
CRS_DV
RX_ER
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used with the
Output
Table 37. RMII Receive AC Timing Specifications
MRX
Figure 22. RMII Receive AC Timing Diagram
t
RMRH
t
RMRDV
clock reference (K) going to the low (L) state or hold time. Note that, in general, the
DD
MRDXKL
Figure 21. eTSEC AC Test Load
of 3.3 V ± 5%.
t
RMR
Z
0
symbolizes MII receive timing (GR) with respect to the time data input signals
= 50 Ω
Valid Data
t
RMRH
t
Symbol
RMRF
t
t
t
RMRDX
t
RMRDV
t
t
RMRR
RMRF
RMRJ
RMR
/t
for outputs. For example, t
RMR
(first two letters of functional block)(signal)(state) (reference)(state)
1
R
t
RMRDX
t
L
RMRR
= 50 Ω
15.0
Min
1.0
1.0
4.0
2.0
35
—
LV
DD
20.0
Typ
MRDVKH
50
—
—
—
—
—
/2
MRX
Freescale Semiconductor
clock reference (K) going
symbolizes MII receive
Max
25.0
250
2.0
2.0
65
—
—
Unit
ns
ps
ns
ns
ns
ns
%