MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 377
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MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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The user program can only access virtual addresses starting at 16 Mbytes
the stacks for user tasks are allocated in this area of virtual memory. Super-
visor programs can access the entire virtual map; they can access addresses
that directly access the I/O ports as well as the entire physical memory at
3 Mbytes. Folding the physical address space into the virtual space greatly
simplifies operations that use physical addresses. The folding does not nec-
system code to perform address translation.
This virtual memory map provides supervisor addresses that are unique with
The separate user and supervisor maps suggest that two root pointers should
the supervisor must be able to access user translation tables for proper access
to user data items. With separate root pointers, the supervisor table structure
table lookup (function code level) for the supervisor address table.
This example uses a simpler scheme instead. Only the CPU root pointer is
The translation table structure consists of:
and extending upward to the limit of 512 Mbytes. The code, the data, and
untranslated addresses. The address tables are set up so that virtual ad-
dresses are equal to the physical addresses for the supervisor between 1 and
essarily mean that the virtual addresses are the same as the physical ad-
dresses. For example, the boot/diagnostic ROM at physical address zero could
be assigned a virtual address of 3 Mbytes. However, any external bus masters
or circuitry (such as breakpoint registers) resident on the physical side of the
bus must have physical addresses. This requires the overhead of operating
respect to user addresses; all supervisor routines can directly access any
user area without being restricted to certain instructions or addressing modes.
be used, one for the supervisor map and one for the user map. However,
must be linked to that of the user. To do this requires an additional level of
supervisor portion, the first 16 Mbytes of virtual address space) points to the
same lower level table. This common lower level table has supervisor pro-
used, and, for each task, the first entry of the upper level table (for the
CRP0 upper level table in the task control block, which contains 32 long
[31]B lower level table for last 16 Mbytes (of 496 total) of user program/
[0] 0 lower level table common to all tasks; maps all operating system
[1] j
data/stack area.
pointers:
areas (first 4 Mbytes of virtual space). This common table contains
512 short-page entries (2K bytes).
lower level table for first 16 Mbytes of user program/data/stack area.
MC68030 USER'S MANUAL
MOTOROLA
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