MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 345
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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9
9-44
/
- BITS SET - v
M A N D ~
ACC_STATUS[WP] ~
TYPE ~
CREATE ATC
I
ACC_STATUS[CI] ~
Figure 9-29. Detailed Flowchart of Descriptor Fetch Operation
' I NVALID'
I
I
"~I' - WRITE OPERATION
- M
EXECUTE WRITE CYCLE J
ENTRY
OR
M-~--~
U BIT CLEAR
~
I ACC S{TUS[WP]
ACC_STATUS[WP] V WP
SIZE = 4
( RET°RN )
ACC STATUSES] ~
CI
I
J
TYPE "~'I" ' I NVALID'
EXECUTE WRITE CYCLE I
SIZE = 8
~
r , ~ ' ~ o RMA L TERMINATION OF ALL BUS ACTIVITY
~EAD OPERATIOIk~
~
M~--M
MC68030 USER'S MANUAL
U BIT CLEAR
J
ACC_STATUESI[WP] V
L..
OTHERWISE'~
ACC STATUSES] V S
~U
FETCH 4 OR B BYTE DESCRIPTOR AT
(INDEX : FC. TIA, TIB, TIC, OR TID)
PDATE HISTORY AND STATUS.,/
PA = DESCRIPTOR ADDRESS
PA = TA + {INDEX*SIZE)
(INDIRECT DESCRIPTOR]
FETCH DESCRIPTOR &
(RETURN)
ACC_STATUS[WP] " q l ~ I
OR AT
CREATE ATC ENTRY )
U BIT SET
WP
I
I
["""'~ORMAL TERMINATION OF ALL 8US ACTIVITY
"V"IS THE LOGICAL OR OPERATOR
~'~
OTHERWISE
ACC_STATUS[WP] V WP
O , ET OOIT LEAR
(
ACC STATUSES] ~
RETURN ~
~
J
SIZE =
~
8
ACC STATUSIS] V S
MOTOROLA
E.CYCLE
I
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