MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 360
MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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9.7.4 M M U Status Register
MOTOROLA
The MMU status register (MMUSR) is a 16-bit register that contains the status
LOGICAL ADDRESS MASK
information returned by execution of the PTEST instruction. The PTEST in-
struction searches either the ATC (PTEST with level 0) or the translation tables
(PTEST with levels of 1-7) to determine status information about the trans-
lation of a specified logical address. The MMUSR is shown in Figure 9-38.
This 8-bit field contains a mask for the LOGICAL ADDRESS BASE field.
ADDRESS BASE field to be ignored. Blocks of memory larger than 16
to define contiguous blocks larger than 16 Mbytes, although this is not
Setting a bit in this field causes the corresponding bit of the LOGICAL
Mbytes can be transparently translated by setting some of the logical ad-
dress mask bits to ones. Normally, the low-order bits of this field are set
required.
Figure 9-38. MMU Status Register (MNlUSR) Format
15
B
14
L
S - - SUPERVISOR-ONLY
B - - BUS ERROR
L --- LIMIT VIOLATION
W - -
13
S
W R I T E . P R O T E C T E D
MC68030 USER'S MANUAL
12
0
11
W
10
I
M
9
8
0
7
0
6
T
I - - INVALIO
M - - MODIFIED
T - - TRANSPARENT ACCESS
N - - NUMBER OF LEVELS
0
0
3
0
N
0
9-59
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