MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 311
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MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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9
9-10
9 . 1 . 2 T r a n s l a t i o n
the translation tree would have four levels, and the two bottom levels would
The following equation for fields in the TC register must be satisfied:
That is, every bit of the logical address either addresses a byte within the
Table 9-1 lists the valid sizes of the table indexes ateach of the levels indexed
five levels can be defined by the logical address. The function code lookup
The address translation trees consist of tables of descriptors. These descrip-
tors can be one of four basic types: table descriptors, page descriptors (nor-
contains five, the TIB field contains nine, and the TIC and TID fields contain
zero defines a three-level translation tree: The top level is indexed by the
function code, the next level by five logical address bits, and the bottom level
each be indexed by 9-bit portions of the logical address.
page, is part of the index at some level of the address table, or is explicitly
ignored by initial shift.
dress. When the function code is also used to select a descriptor, a total of
level and levels B, C, and D can be suppressed.
these descriptors has both a long-format and a short-format representation.
A root pointer descriptor defines the root of a tree and can be a table de-
scriptor or an early termination page descriptor. A table descriptor points to
NOTE 1 : If any of these fields are zero, the remaining fields are ignored.
For example, a TC register in which the FCL bit is set to one, the TIA field
by nine logical address bits. If the TIC field contained nine instead of zero,
by the TIx fields and the position of each table index within the logical ad-
mal or early termination), invalid descriptors, or indirect descriptors. Each of
a descriptor table in memory that defines the next lower level in the trans-
lation tree. An early termination page descriptor causes immediate termi-
Field
A
B
C
D
T a b l e D e s c r i p t o r s
31-1S-TIA
31-1S-TIA-TIB
31-1S
31-1S-TIA-TIB-TIC
I S + P S + T I A + T I B 1+TIC I + T I D 1 = 32
Starting Bit Position
MC68030 USER'S MANUAL
Table 9-1. Size Restrictions
i0-15 (ignored if TIB or TIC is zero)
0-15
0-15 (ignored if TIB is zero)
1-15 (TIA must be
minimum of two if TIB=0)
Size Restrictions
greater
than zero;
MOTOROLA
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