MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 306
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MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
- Current page: 306 of 599
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MOTOROLA
System software selects the parameters for the translation tables by confi-
guring the translation control register (TC) appropriately. The function codes
or a portion of the logical address can be defined as the index into the first
as 15 bits can be used at a given level).
level of lookup in the table. The TC register specifies how many bits of the
logical address are used as the index for each level of the lookup (as many
An MMU translation table has a tree structure with the base of the first table
translation table is resident in one of two root pointer registers. The general
tree structure is shown in Figure 9-3. Table entries at the upper levels of a
tree point to other tables. The table leaf entries are page frame addresses.
translation tables reside in the physical address space.
defined by a root pointer descriptor. The root pointer descriptor of the current
All addresses stored in the translation tables are physical addresses; the
DD
'
ROOT POI N TER ~
Figure 9-3. Translation Table Tree
MC68030 USER'S MANUAL
F I
I
F'~
I
POI N TER
TABLES
TABLES
PABE
9-5
9
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