MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 356
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MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
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MOTOROLA
The fields of the TC register are:
Enable (E)
Supervisor Root Pointer Enable (SRE)
Function Code Lookup (FCL)
translation table defined by the CRP. When the SRP is enabled, user ac-
This bit enables and disables address translation:
A reset operation clears this bit. When translation is disabled, logical ad-
dresses are used as physical addresses. The MMU instructions (PTEST,
state of the E bit. Additionally, even if the E bit is set, the TC register can
affect the use of the transparent translation registers.
This bit controls the use of the supervisor root pointer register (SRP):
When the SRP is disabled, both user and supervisor accesses use the
cesses use the CRP, and supervisor accesses use the SRP.
This bit enables the use of function code lookup for searching the address
translation tables:
When function code lookup is disabled, the first level of pointer tables
within the translation table structure is indexed by the logical address field
the translation table structure is indexed by function code. In this case, the
PLOAD, PMOVE, PFLUSH) can be executed successfully, regardless of the
be updated with a value whose E bit is set. The state of the E bit does not
defined by TIA. When function code lookup is
limit field of CRP or SRP is ignored.
0 - - Translation disabled
0 - - SRP disabled
1 - - Translation enabled
0 - - Function code lookup disabled
1 - - SRP enabled
1 - - Function code lookup enabled
MC68030 USER'S MANUAL
enabled,
the first table of
9-55
9
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