XC4VFX12-11FFG668C Xilinx Inc, XC4VFX12-11FFG668C Datasheet - Page 39

• Manufacturer Part Number: XC4VFX12-11FFG668C
• Description: IC FPGA VIRTEX-4 FX 12K 668FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX12-11FFG668C

• Number Of Logic Elements/cells: 12312
• Number Of Labs/clbs: 1368
• Total Ram Bits: 663552
• Number Of I /o: 320
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 668-BBGA, FCBGA
• For Use With: HW-V4-ML403-UNI-G - EVALUATION PLATFORM VIRTEX-4HW-AFX-FF668-400 - BOARD DEV VIRTEX 4 FF668
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Regional Clocking Resources
Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
R
Table 1-6: Virtex-4 FPGA Clock Regions
Regional clock networks are a set of clock networks independent of the global clock
network. Unlike global clocks, the span of a regional clock signal is limited to three clock
regions. These networks are especially useful for source-synchronous interface designs.
To understand how regional clocking works, it is important to understand the signal path
of a regional clock signal. The Virtex-4 FPGA regional clocking resources and network
consist of the following paths and components:
•
•
•
•
LX Family
XC4VLX15
XC4VLX25
XC4VLX40
XC4VLX60
XC4VLX80
XC4VLX100
XC4VLX160
XC4VLX200
SX Family
XC4VSX25
XC4VSX35
XC4VSX55
FX Family
XC4VFX12
XC4VFX20
XC4VFX40
XC4VFX60
XC4VFX100
XC4VFX140
Clock Capable I/O
I/O Clock Buffer - BUFIO
Regional Clock Buffer - BUFR
Regional Clock Nets
Device
Number of Clock Regions
www.xilinx.com
12
16
12
16
20
24
12
16
16
20
24
24
24
8
8
8
8
Regional Clocking Resources
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