XC4VFX12-11FFG668C Xilinx Inc, XC4VFX12-11FFG668C Datasheet - Page 296

• Manufacturer Part Number: XC4VFX12-11FFG668C
• Description: IC FPGA VIRTEX-4 FX 12K 668FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX12-11FFG668C

• Number Of Logic Elements/cells: 12312
• Number Of Labs/clbs: 1368
• Total Ram Bits: 663552
• Number Of I /o: 320
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 668-BBGA, FCBGA
• For Use With: HW-V4-ML403-UNI-G - EVALUATION PLATFORM VIRTEX-4HW-AFX-FF668-400 - BOARD DEV VIRTEX 4 FF668
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 6: SelectIO Resources
296
HyperTransport Protocol (LDT)
Figure 6-75
50Ω transmission lines.
Table 6-33
Table 6-33: Allowed Attributes of the LVDS I/O Standard
Table 6-34
supported.
Table 6-34: Allowed Attributes of the LVDS DCI I/O Standard
The HyperTransport™ protocol or formally known as Lightning Data Transport (LDT) is a
low-voltage standard for high-speed interfaces. Its differential signaling based interface is
very similar to LVDS. Virtex-4 FPGA IOBs are equipped with LDT buffers.
summarizes all the possible LDT I/O standards and attributes supported.
IOSTANDARD
CAPACITANCE
DIFF_TERM
IOSTANDARD
CAPACITANCE
Attributes
Attributes
LVDS_25
lists the available Virtex-4 FPGA LVDS I/O standards and attributes supported.
lists the available Virtex-4 FPGA LVDS DCI I/O standards and attributes
is an example of a differential termination for an LVDS receiver on a board with
Figure 6-75: LVDS_25 With DIFF_TERM Receiver Termination
IOB
www.xilinx.com
IBUFDS/IBUFGDS
IBUFDS/IBUFGDS
LVDSEXT_25_DCI
0
LOW, NORMAL,
LOW, NORMAL,
LVDS_25_DCI
TRUE, FALSE
DONT CARE
DONT CARE
Z
Z
0
0
= 50Ω
= 50Ω
LVDS_25, LVDSEXT_25, ULVDS_25
0
Primitives
Primitives
IOB
R DIFF = 100Ω
UG070 (v2.6) December 1, 2008
OBUFDS/OBUFTDS
OBUFDS/OBUFTDS
Virtex-4 FPGA User Guide
NORMAL
Unused
Unused
Unused
LVDS_25
+
–
ug070_6_73_071904
Table 6-35
Data in
R